Invention Grant
- Patent Title: File pre-fetch scheduling for cache memory to reduce latency
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Application No.: US16649713Application Date: 2017-11-22
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Publication No.: US11366757B2Publication Date: 2022-06-21
- Inventor: Liang Fang , Zhen Zhou
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: 2SPL Patent Attorneys PartG mbB
- Agent Kieran O'Leary
- International Application: PCT/CN2017/112360 WO 20171122
- International Announcement: WO2019/100263 WO 20190531
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0862 ; G06F16/16 ; G06F16/17 ; G06F9/30 ; G06F9/4401 ; G06F12/123

Abstract:
Techniques are provided for the scheduling of file pre-fetches from a file system into a cache memory, to reduce subsequent latency associated with future accesses to those files. A methodology implementing the techniques according to an embodiment includes monitoring accesses to files of the file system (e.g., file open and file read operations) and maintaining a record for each of the accessed files. The record includes an identifier of the file, the number of accesses of the file, and the number of cache memory misses associated with those accesses. The method also includes storing the record into a file access history database (FAHD). The method further includes generating, in response to an Operating System (OS) shutdown, a frequently used file list (FUFL) based on the FAHD. The method further includes pre-fetching files identified by a selected subset of the FUFL to the cache memory during an OS boot.
Public/Granted literature
- US20200257628A1 FILE PRE-FETCH SCHEDULING FOR CACHE MEMORY TO REDUCE LATENCY Public/Granted day:2020-08-13
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