Invention Grant
- Patent Title: Offset-aligned three-dimensional integrated circuit
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Application No.: US16799243Application Date: 2020-02-24
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Publication No.: US11437359B2Publication Date: 2022-09-06
- Inventor: Brett P. Wilkerson , Milind S. Bhagavat , Rahul Agarwal , Dmitri Yudanov
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Zagorin Cave LLP
- Main IPC: H01L25/18
- IPC: H01L25/18 ; H01L23/367 ; H01L23/00 ; H01L25/00 ; H01L23/48

Abstract:
A method for manufacturing a three-dimensional integrated circuit includes attaching a first side of a first die to a first carrier wafer. The method includes preparing a second side of the first die to generate a prepared second side of the first die. The method includes attaching the prepared second side of the first die to a second carrier wafer. The method includes removing the first carrier wafer from the first side of the first die to form a transitional three-dimensional integrated circuit. The method includes attaching a third carrier wafer to a first side of the transitional three-dimensional integrated circuit. The method includes attaching a first side of the second die to a second side of the transitional three-dimensional integrated circuit.
Information query
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