The present description relates to the fabrication of microelectronic transistor source and/or drain regions using angled etching. In one embodiment, a microelectronic transistor may be formed by using an angled etch to reduce the number masking steps required to form p-type doped regions and n-type doped regions. In further embodiments, angled etching may be used to form asymmetric spacers on opposing sides of a transistor gate, wherein the asymmetric spacers may result in asymmetric source/drain configurations.