Invention Grant
- Patent Title: Semiconductor device and method of forming electrical circuit pattern within encapsulant of SIP module
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Application No.: US17307795Application Date: 2021-05-04
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Publication No.: US11581233B2Publication Date: 2023-02-14
- Inventor: JinHee Jung , ChangOh Kim
- Applicant: STATS ChipPAC Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/60 ; H01L23/66 ; H01L21/56

Abstract:
A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.
Public/Granted literature
- US20220359321A1 Semiconductor Device and Method of Forming Electrical Circuit Pattern Within Encapsulant of SIP Module Public/Granted day:2022-11-10
Information query
IPC分类: