Invention Grant
- Patent Title: Multilayer structure and related method of manufacture for electronics
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Application No.: US17368244Application Date: 2021-07-06
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Publication No.: US11594482B2Publication Date: 2023-02-28
- Inventor: Jarmo Sääski , Mikko Heikkinen , Tero Heikkinen , Mika Paani , Jan Tillonen , Ronald Haag
- Applicant: TactoTek Oy
- Applicant Address: FI Oulunsalo
- Assignee: TactoTek Oy
- Current Assignee: TactoTek Oy
- Current Assignee Address: FI Oulunsalo
- Agency: Carter, DeLuca & Farrell LLP
- Agent Robert P. Michal, Esq.
- Main IPC: H05K5/00
- IPC: H05K5/00 ; H01L23/522 ; H05K3/46 ; H01L23/50 ; H01L23/14 ; H01L25/065 ; H05K3/28 ; H05K1/18 ; H05K3/40

Abstract:
An integrated multilayer structure, includes a substrate film having a first side and an opposite second side. The substrate film includes electrically substantially insulating material, a circuit design including a number of electrically conductive areas of electrically conductive material on the first and/or second sides of the substrate film, and a connector including a number of electrically conductive contact elements. The connector is provided to the substrate film so that it extends to both the first and second sides of the substrate film and the number of electrically conductive contact elements connect to one or more of the conductive areas of the circuit design while being further configured to electrically couple to an external connecting element responsive to mating the external connecting element with the connector on the first or second side of or adjacent to the substrate film.
Public/Granted literature
- US20210335702A1 MULTILAYER STRUCTURE AND RELATED METHOD OF MANUFACTURE FOR ELECTRONICS Public/Granted day:2021-10-28
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