Invention Grant
- Patent Title: Instruction cache prefetch throttle
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Application No.: US16709831Application Date: 2019-12-10
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Publication No.: US11620224B2Publication Date: 2023-04-04
- Inventor: Aparna Thyagarajan , Ashok Tirupathy Venkatachar , Marius Evers , Angelo Wong , William E. Jones
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Volpe Koenig
- Main IPC: G06F12/0862
- IPC: G06F12/0862 ; G06F12/0875
Abstract:
Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.
Public/Granted literature
- US20210173783A1 INSTRUCTION CACHE PREFETCH THROTTLE Public/Granted day:2021-06-10
Information query
IPC分类:
