Invention Grant
- Patent Title: Molded direct bonded and interconnected stack
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Application No.: US17448794Application Date: 2021-09-24
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Publication No.: US11764189B2Publication Date: 2023-09-19
- Inventor: Guilian Gao , Cyprian Emeka Uzoh , Jeremy Alfred Theil , Belgacem Haba , Rajesh Katkar
- Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Applicant Address: US CA San Jose
- Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Current Assignee Address: US CA San Jose
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/768 ; H01L23/538 ; H01L23/00

Abstract:
Dies and/or wafers are stacked and bonded in various arrangements including stacks, and may be covered with a molding to facilitate handling, packaging, and the like. In various examples, the molding may cover more or less of a stack, to facilitate connectivity with the devices of the stack, to enhance thermal management, and so forth.
Public/Granted literature
- US20220020729A1 MOLDED DIRECT BONDED AND INTERCONNECTED STACK Public/Granted day:2022-01-20
Information query
IPC分类: