Invention Grant
- Patent Title: Managing power loss in a memory device
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Application No.: US17464350Application Date: 2021-09-01
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Publication No.: US11782831B2Publication Date: 2023-10-10
- Inventor: Huapeng G. Guan , Frederick Adi , Jiangli Zhu , Yipei Yu , Venkata Naga Lakshman Pasala , Wei Wang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/0804
- IPC: G06F12/0804 ; G06F12/1009

Abstract:
A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.
Public/Granted literature
- US20230065617A1 MANAGING POWER LOSS IN A MEMORY DEVICE Public/Granted day:2023-03-02
Information query
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