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    RAPID RELIABLE FILE SYSTEM ACCESS
    1.
    发明申请
    RAPID RELIABLE FILE SYSTEM ACCESS 有权

    公开(公告)号：US20230062949A1

    公开(公告)日：2023-03-02

    申请号：US17462289

    申请日：2021-08-31

    Applicant: Micron Technology, Inc.

    Inventor： Huapeng G. Guan ,  Ximin Shan ,  Yipei Yu ,  Wei Wang

    IPC: G06F3/06 ,  G06F11/14

    Abstract: A system for file system data access can include memory devices including a non-volatile memory device, as well as a processing device, operatively coupled with the memory devices to perform operations including receiving a file system (FS) write command and determining whether a write count of a physical super management unit (PSMU) of the non-volatile memory device satisfies a threshold criterion. The operations can include, recording a change of a super management unit (SMU) mapping for FS data of an FS mapping table, where the FS mapping table is a portion of a logical-to-physical (L2P) mapping table and performing a move of SMU data corresponding to the change of the SMU mapping. They can also include creating a backup copy of the FS mapping table on the non-volatile memory device, and restoring the FS mapping table from the backup copy of the FS mapping table.

    POWER LOSS RECOVERY FOR MEMORY DEVICES
    2.
    发明申请
    POWER LOSS RECOVERY FOR MEMORY DEVICES 有权

    公开(公告)号：US20220100608A1

    公开(公告)日：2022-03-31

    申请号：US17486260

    申请日：2021-09-27

    Applicant: Micron Technology, Inc.

    Inventor： Yipei Yu ,  Wei Wang ,  Jiangli Zhu ,  Huapeng Guan

    IPC: G06F11/14 ,  G06F12/06

    Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices. The processing device is configured to store, on a non-volatile memory device of the one or more memory devices, a snapshot of a logical-to-physical (L2P) table comprising a plurality of L2P table entries, each L2P table entry mapping a logical address defined in a logical address space to a physical address identifying a management unit on a memory device of the one or more memory devices; store, on the non-volatile memory device of the one or more memory devices, a physical-to-logical (P2L) table comprising a plurality of P2L table entries, each L2P table entry mapping a physical address identifying a management unit on a memory device of the one or more memory devices to metadata associated with the management unit; store, on the non-volatile memory device, a list of unallocated MUs; store, on the non-volatile memory device, an L2P update journal including one or more L2P journal entries, wherein each L2P journal entry reflects an update to an L2P table entry of the plurality of L2P table entries, wherein the update has been performed after storing the snapshot of the L2P table; and responsive to detecting a power up event following a power loss event, reconstruct the L2P table using the snapshot of the L2P table, the L2P update journal, the P2L table, and the list of unallocated management units.

    Managing power loss in a memory device
    3.
    发明授权
    Managing power loss in a memory device 有权

    公开(公告)号：US11782831B2

    公开(公告)日：2023-10-10

    申请号：US17464350

    申请日：2021-09-01

    Applicant: Micron Technology, Inc.

    Inventor： Huapeng G. Guan ,  Frederick Adi ,  Jiangli Zhu ,  Yipei Yu ,  Venkata Naga Lakshman Pasala ,  Wei Wang

    IPC: G06F12/0804 ,  G06F12/1009

    CPC classification number: G06F12/0804 ,  G06F12/1009 ,  G06F2212/1032 ,  G06F2212/657

    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.

    Rapid reliable file system access
    4.
    发明授权
    Rapid reliable file system access 有权

    公开(公告)号：US11768631B2

    公开(公告)日：2023-09-26

    申请号：US17462289

    申请日：2021-08-31

    Applicant: Micron Technology, Inc.

    Inventor： Huapeng G. Guan ,  Ximin Shan ,  Yipei Yu ,  Wei Wang

    IPC: G06F3/06 ,  G06F11/14

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0676 ,  G06F3/0679 ,  G06F11/1448

    Abstract: A system for file system data access can include memory devices including a non-volatile memory device, as well as a processing device, operatively coupled with the memory devices to perform operations including receiving a file system (FS) write command and determining whether a write count of a physical super management unit (PSMU) of the non-volatile memory device satisfies a threshold criterion. The operations can include, recording a change of a super management unit (SMU) mapping for FS data of an FS mapping table, where the FS mapping table is a portion of a logical-to-physical (L2P) mapping table and performing a move of SMU data corresponding to the change of the SMU mapping. They can also include creating a backup copy of the FS mapping table on the non-volatile memory device, and restoring the FS mapping table from the backup copy of the FS mapping table.

    Power loss recovery for memory devices
    7.
    发明授权
    Power loss recovery for memory devices 有权

    公开(公告)号：US11714722B2

    公开(公告)日：2023-08-01

    申请号：US17486260

    申请日：2021-09-27

    Applicant: Micron Technology, Inc.

    Inventor： Yipei Yu ,  Wei Wang ,  Jiangli Zhu ,  Huapeng Guan

    IPC: G06F11/14

    CPC classification number: G06F11/1446 ,  G06F11/1471 ,  G06F2201/84

    Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices. The processing device is configured to store, on a non-volatile memory device of the one or more memory devices, a snapshot of a logical-to-physical (L2P) table comprising a plurality of L2P table entries, each L2P table entry mapping a logical address defined in a logical address space to a physical address identifying a management unit on a memory device of the one or more memory devices; store, on the non-volatile memory device of the one or more memory devices, a physical-to-logical (P2L) table comprising a plurality of P2L table entries, each L2P table entry mapping a physical address identifying a management unit on a memory device of the one or more memory devices to metadata associated with the management unit; store, on the non-volatile memory device, a list of unallocated MUs; store, on the non-volatile memory device, an L2P update journal including one or more L2P journal entries, wherein each L2P journal entry reflects an update to an L2P table entry of the plurality of L2P table entries, wherein the update has been performed after storing the snapshot of the L2P table; and responsive to detecting a power up event following a power loss event, reconstruct the L2P table using the snapshot of the L2P table, the L2P update journal, the P2L table, and the list of unallocated management units.

    MANAGING POWER LOSS IN A MEMORY DEVICE
    8.
    发明申请
    MANAGING POWER LOSS IN A MEMORY DEVICE 有权

    公开(公告)号：US20230065617A1

    公开(公告)日：2023-03-02

    申请号：US17464350

    申请日：2021-09-01

    Applicant: Micron Technology, Inc.

    Inventor： Huapeng G. Guan ,  Frederick Adi ,  Jiangli Zhu ,  Yipei Yu ,  Venkata Naga Lakshman Pasala ,  Wei Wang

    IPC: G06F12/0804 ,  G06F12/1009

    Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.

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