Invention Grant
- Patent Title: Combined world-space pipeline shader stages
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Application No.: US17234692Application Date: 2021-04-19
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Publication No.: US11869140B2Publication Date: 2024-01-09
- Inventor: Mangesh P. Nijasure , Randy W. Ramsey , Todd Martin
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Volpe Koenig
- Main IPC: G06T15/80
- IPC: G06T15/80 ; G06T15/00

Abstract:
Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.
Public/Granted literature
- US20210272354A1 COMBINED WORLD-SPACE PIPELINE SHADER STAGES Public/Granted day:2021-09-02
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