Invention Grant
- Patent Title: Double cross-couple for two-row flip-flop using CFET
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Application No.: US17328446Application Date: 2021-05-24
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Publication No.: US11923364B2Publication Date: 2024-03-05
- Inventor: Lars Liebmann , Jeffrey Smith , Daniel Chanemougame , Paul Gutwin
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L23/528 ; H01L23/532 ; H01L29/06 ; H01L29/417 ; H01L29/423 ; H01L29/786

Abstract:
A semiconductor device includes a cell array having tracks and rows formed on a substrate. The tracks extend perpendicularly to the rows. A logic cell is formed across two adjacent rows within the cell array. The logic cell includes a cross-couple (XC) in each row and a plurality of poly tracks across the two adjacent rows. Each XC includes two cross-coupled complementary field-effect-transistors. Each poly track is configured to function as an inter-row gate for the XCs. A pair of signal tracks is positioned on opposing boundaries of the logic cell and electrically coupled to the plurality of poly tracks.
Public/Granted literature
- US20220181322A1 DOUBLE CROSS-COUPLE FOR TWO-ROW FLIP-FLOP USING CFET Public/Granted day:2022-06-09
Information query
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