Invention Application
- Patent Title: MULTI-RATE TRANSCEIVER CIRCUITRY
-
Application No.: US15826472Application Date: 2017-11-29
-
Publication No.: US20180083765A1Publication Date: 2018-03-22
- Inventor: Boon Hong Oh , Chee Wai Yap
- Applicant: Altera Corporation
- Main IPC: H04L7/033
- IPC: H04L7/033 ; G09G5/00 ; H03M9/00 ; H04L7/00

Abstract:
Techniques to operate circuitry in an integrated circuit are provided. The circuitry may include a receiver circuit and one of the provided techniques includes receiving a data stream at the receiver circuit. The receiver circuit may include a detector circuit that is used to determine the data rate of the received data stream. A controller block in the receiver circuit may accordingly configure a deserializer circuit in the receiver circuit based on the data rate of the received data stream. The circuitry may further include a transmitter circuit for transmitting data streams. The transmitter circuit may be configured during runtime based on the data rate of a data stream that is being transmitted. In some instances, irrespective of the data rate of the data stream being transmitted, a constant reference clock may be used in the transmitter circuit.
Public/Granted literature
- US10439795B2 Multi-rate transceiver circuitry Public/Granted day:2019-10-08
Information query