Invention Grant
US07671469B2 SiGe device with SiGe-embedded dummy pattern for alleviating micro-loading effect
有权
SiGe器件采用SiGe嵌入式虚拟图案，可减轻微负载效应
- Patent Title: SiGe device with SiGe-embedded dummy pattern for alleviating micro-loading effect
- Patent Title (中): SiGe器件采用SiGe嵌入式虚拟图案，可减轻微负载效应
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Application No.: US11967264Application Date: 2007-12-31
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Publication No.: US07671469B2Publication Date: 2010-03-02
- Inventor: Tung-Hsing Lee , Ming-Tzong Yang , Tao Cheng , Ching-Chung Ko , Tien-Chang Chang , Yu-Tung Chang
- Applicant: Tung-Hsing Lee , Ming-Tzong Yang , Tao Cheng , Ching-Chung Ko , Tien-Chang Chang , Yu-Tung Chang
- Applicant Address: TW Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L23/52
- IPC: H01L23/52
Abstract:
A semiconductor device with dummy patterns for alleviating micro-loading effect includes a semiconductor substrate having thereon a middle annular region between an inner region and an outer region; a SiGe device on the semiconductor substrate within the inner region; and a plurality of dummy patterns provided on the semiconductor substrate within the middle annular region. At least one of the dummy patterns contains SiGe.
Public/Granted literature
- US20090166676A1 SIGE DEVICE WITH SIGE-EMBEDDED DUMMY PATTERN FOR ALLEVIATING MICRO-LOADING EFFECT Public/Granted day:2009-07-02
Information query
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