公开(公告)号：US09594831B2

公开(公告)日：2017-03-14

申请号：US13531493

申请日：2012-06-22

Applicant: Chi Wang ,  Kaushik Chakrabarti ,  Tao Cheng ,  Surajit Chaudhuri

Inventor： Chi Wang ,  Kaushik Chakrabarti ,  Tao Cheng ,  Surajit Chaudhuri

IPC: G06F17/30 ,  G06F17/27

CPC classification number: G06F17/30687 ,  G06F17/278

Abstract: A targeted disambiguation system is described herein which determines true mentions of a list of named entities in a collection of documents. The list of named entities is homogenous in the sense that the entities pertain to the same subject matter domain. The system determines the true mentions by leveraging the homogeneity in the list, and, more specifically by applying a context similarity hypothesis, a co-mention hypothesis, and an interdependency hypothesis. In one implementation, the system executes its analysis using a graph-based model. The system can operate without the existence of additional information regarding the entities in the list; nevertheless, if such information is available, the system can integrate it into its analysis.

Abstract translation: 本文描述了一种有针对性的消歧系统，其确定了文档集合中真实提到的命名实体的列表。 在实体属于相同主题领域的意义上，命名实体的列表是同质的。 系统通过利用列表中的同质性来确定真实的提及，更具体地说，通过应用上下文相似性假设，共同提及假设和相互依赖性假设。 在一个实现中，系统使用基于图的模型来执行其分析。 该系统可以在没有关于列表中的实体的附加信息的情况下运行; 然而，如果这些信息可用，系统可以将其整合到其分析中。

公开(公告)号：US09153570B2

公开(公告)日：2015-10-06

申请号：US12712812

申请日：2010-02-25

Applicant: Shih-Yu Wang ,  Chia-Ling Lu ,  Yan-Yu Chen ,  Yu-Lien Liu ,  Tao-Cheng Lu

Inventor： Shih-Yu Wang ,  Chia-Ling Lu ,  Yan-Yu Chen ,  Yu-Lien Liu ,  Tao-Cheng Lu

IPC: H01L23/62 ,  H01L27/02

CPC classification number: H01L27/0262

Abstract: An electrostatic discharge tolerant device includes a semiconductor body having a first conductivity type, and a pad. A surrounding well having a second conductivity type is laid out in a ring to surround an area for an electrostatic discharge circuit in the semiconductor body. The surrounding well is relatively deep, and in addition to defining the area for the electrostatic discharge circuit, provides the first terminal of a diode formed with the semiconductor body. Within the area surrounded by the surrounding well, a diode coupled to the pad and a transistor coupled to the voltage reference are connected in series and form a parasitic device in the semiconductor body.

Abstract translation: 静电放电容纳装置包括具有第一导电类型的半导体本体和衬垫。 具有第二导电类型的周围阱布置在环中以围绕半导体本体中的静电放电电路的区域。 周围的阱相对较深，除了限定静电放电电路的区域之外，还提供了形成有半导体本体的二极管的第一端子。 在由周围的阱包围的区域内，耦合到焊盘的二极管和耦合到电压基准的晶体管串联连接并在半导体本体中形成寄生器件。

公开(公告)号：US08748936B2

公开(公告)日：2014-06-10

申请号：US13555075

申请日：2012-07-20

Applicant: Shih-Yu Wang ,  Chia-Ling Lu ,  Yan-Yu Chen ,  Yu-Lien Liu ,  Tao-Cheng Lu

Inventor： Shih-Yu Wang ,  Chia-Ling Lu ,  Yan-Yu Chen ,  Yu-Lien Liu ,  Tao-Cheng Lu

IPC: H01L29/73

CPC classification number: H01L29/7436 ,  H01L27/0251 ,  H01L27/0262 ,  H01L29/0692 ,  H01L29/78 ,  H01L29/7835 ,  H01L2924/0002 ,  H03K17/08 ,  H03K19/003 ,  H01L2924/00

Abstract: A semiconductor device includes a first well region of a first conductivity type, a second well region of a second conductive type within the first well region. A first region of the first conductivity type and a second region of the second conductivity type are disposed within the second well region. A third region of the first conductivity type and a fourth region of the second conductivity type are disposed within the first well region, wherein the third region and the fourth region are separated by the second well region. The semiconductor device also includes a switch device coupled to the third region.

Abstract translation: 半导体器件包括第一导电类型的第一阱区域和第一阱区域内的第二导电类型的第二阱区域。 第一导电类型的第一区域和第二导电类型的第二区域设置在第二阱区域内。 第一导电类型的第三区域和第二导电类型的第四区域设置在第一阱区域内，其中第三区域和第四区域被第二阱区域分开。 半导体器件还包括耦合到第三区域的开关器件。

公开(公告)号：US20130346421A1

公开(公告)日：2013-12-26

申请号：US13531493

申请日：2012-06-22

Applicant: Chi Wang ,  Kaushik Chakrabarti ,  Tao Cheng ,  Surajit Chaudhuri

Inventor： Chi Wang ,  Kaushik Chakrabarti ,  Tao Cheng ,  Surajit Chaudhuri

IPC: G06F17/30

CPC classification number: G06F17/30687 ,  G06F17/278

Abstract: A targeted disambiguation system is described herein which determines true mentions of a list of named entities in a collection of documents. The list of named entities is homogenous in the sense that the entities pertain to the same subject matter domain. The system determines the true mentions by leveraging the homogeneity in the list, and, more specifically by applying a context similarity hypothesis, a co-mention hypothesis, and an interdependency hypothesis. In one implementation, the system executes its analysis using a graph-based model. The system can operate without the existence of additional information regarding the entities in the list; nevertheless, if such information is available, the system can integrate it into its analysis.

Abstract translation: 本文描述了一种有针对性的消歧系统，其确定了文档集合中真实提到的命名实体的列表。 在实体属于相同主题领域的意义上，命名实体的列表是同质的。 系统通过利用列表中的同质性来确定真实的提及，更具体地说，通过应用上下文相似性假设，共同提及假设和相互依赖性假设。 在一个实现中，系统使用基于图的模型来执行其分析。 该系统可以在没有关于列表中的实体的附加信息的情况下运行; 然而，如果这些信息可用，系统可以将其整合到其分析中。

公开(公告)号：US08334672B2

公开(公告)日：2012-12-18

申请号：US12764200

申请日：2010-04-21

Applicant: Cheng-Tao Cheng

Inventor： Cheng-Tao Cheng

IPC: H02J7/00

CPC classification number: H02J7/0052 ,  H02J2007/0062

Abstract: A charging circuit used to identify a power source connected to a portable electronic device includes a connector, an identifying circuit, and a central processing unit. The connector includes a voltage bus contact, a ground contact, a positive data contact and a negative data contact. The identifying circuit is connected to the positive data contact or the negative data contact to identify the power source and generates a configuration signal. The central processing unit receives the configuration signal and operates a corresponding charging mode.

Abstract translation: 用于识别连接到便携式电子设备的电源的充电电路包括连接器，识别电路和中央处理单元。 连接器包括电压总线触点，接地触点，正数据触点和负数据触点。 识别电路连接到正数据触点或负数据触点，以识别电源并产生配置信号。 中央处理单元接收配置信号并操作相应的充电模式。

公开(公告)号：US20120127795A1

公开(公告)日：2012-05-24

申请号：US12949076

申请日：2010-11-18

Applicant: Guan-Wei Wu ,  I-Chen Yang ,  Yao-Wen Chang ,  Tao-Cheng Lu

Inventor： Guan-Wei Wu ,  I-Chen Yang ,  Yao-Wen Chang ,  Tao-Cheng Lu

IPC: G11C16/04 ,  H01L21/336 ,  H01L29/792

CPC classification number: H01L21/28282 ,  G11C16/0475 ,  H01L27/11565 ,  H01L27/11568 ,  H01L29/7923

Abstract: A non-volatile memory and a manufacturing method thereof and a method for operating a memory cell are provided. The non-volatile memory includes a substrate, first and second doped regions, a charged-trapping structure, first and second gates and an inter-gate insulation layer. The first and second doped regions are disposed in the substrate and extend along a first direction. The first and second doped regions are arranged alternately. The charged-trapping structure is disposed on the substrate. The first and second gates are disposed on the charged-trapping structure. Each first gate is located above one of the first doped regions. The second gates extend along a second direction and are located above the second doped regions. The inter-gate insulation layer is disposed between the first gates and the second gates. Adjacent first and second doped regions and the first gate, the second gate and the charged-trapping structure therebetween define a memory cell.

Abstract translation: 提供一种非易失性存储器及其制造方法以及操作存储单元的方法。 非易失性存储器包括衬底，第一和第二掺杂区域，带电捕获结构，第一和第二栅极以及栅极间绝缘层。 第一和第二掺杂区域设置在衬底中并沿着第一方向延伸。 第一和第二掺杂区交替布置。 带电捕获结构设置在基板上。 第一和第二栅极设置在带电捕获结构上。 每个第一栅极位于第一掺杂区域之上。 第二栅极沿着第二方向延伸并且位于第二掺杂区域之上。 栅间绝缘层设置在第一栅极和第二栅极之间。 相邻的第一和第二掺杂区域和第一栅极，其间的第二栅极和带电捕获结构限定了存储单元。

公开(公告)号：US20120126307A1

公开(公告)日：2012-05-24

申请号：US12949092

申请日：2010-11-18

Applicant: GUAN-WEI WU ,  I-Chen Yang ,  Yao-Wen Chang ,  Tao-Cheng Lu

Inventor： GUAN-WEI WU ,  I-Chen Yang ,  Yao-Wen Chang ,  Tao-Cheng Lu

IPC: H01L29/792 ,  H01L21/336

CPC classification number: H01L29/792 ,  H01L21/76232

Abstract: A non-volatile memory and a manufacturing method thereof are provided. The non-volatile memory includes a substrate, a gate structure, a first doped region, a second doped region and a pair of isolation structures. The gate structure is disposed on the substrate. The gate structure includes a charge storage structure, a gate and spacers.The charge storage structure is disposed on the substrate. The gate is disposed on the charge storage structure. The spacers are disposed on the sidewalls of the gate and the charge storage structure. The first doped region and the second doped region are respectively disposed in the substrate at two sides of the charge storage structure and at least located under the spacers. The isolation structures are respectively disposed in the substrate at two sides of the gate structure.

Abstract translation: 提供了一种非易失性存储器及其制造方法。 非易失性存储器包括衬底，栅极结构，第一掺杂区，第二掺杂区和一对隔离结构。 栅极结构设置在基板上。 栅极结构包括电荷存储结构，栅极和间隔物。 电荷存储结构设置在基板上。 栅极设置在电荷存储结构上。 间隔件设置在栅极和电荷存储结构的侧壁上。 第一掺杂区域和第二掺杂区域分别设置在电荷存储结构的两侧的基板中，并且至少位于间隔物之下。 隔离结构分别设置在栅极结构的两侧的基板中。

公开(公告)号：US08138616B2

公开(公告)日：2012-03-20

申请号：US12168161

申请日：2008-07-07

Applicant: Tien-Chang Chang ,  Tao Cheng ,  Chien-Hui Chuang ,  Bo-Shih Huang

Inventor： Tien-Chang Chang ,  Tao Cheng ,  Chien-Hui Chuang ,  Bo-Shih Huang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/05 ,  H01L23/522 ,  H01L23/585 ,  H01L23/60 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A bond pad structure of an integrated circuit includes a conductive pad disposed on a first dielectric layer, a first conductive block formed in a second dielectric layer below the first dielectric layer and electrically connected to the conductive pad through a first via plug formed in the first dielectric layer, and an electrically floating first conductive plate situated under the conductive pad.

Abstract translation: 集成电路的接合焊盘结构包括设置在第一介电层上的导电焊盘，形成在第一电介质层下面的第二电介质层中的第一导电块，并且通过形成在第一电介质层中的第一通孔插塞电连接到导电焊盘 电介质层和位于导电垫下方的电浮置的第一导电板。

公开(公告)号：US20120038055A1

公开(公告)日：2012-02-16

申请号：US13281458

申请日：2011-10-26

Applicant: Ching-Chung Ko ,  Tao Cheng ,  Tien-Yueh Liu ,  Dar-Shii Chou ,  Peng-Cheng Kao

Inventor： Ching-Chung Ko ,  Tao Cheng ,  Tien-Yueh Liu ,  Dar-Shii Chou ,  Peng-Cheng Kao

IPC: H01L23/535

CPC classification number: H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of IMD layers and first conductive layers embedded in the IMD layers; a first insulating layer overlying the IMD layers and the first conductive layers; a plurality of first power/ground mesh wiring lines, in a second conductive layer overlying the first Insulating layer, for distributing power signal or ground signal; and a second insulating layer covering the second conductive layer and the first insulating layer.

Abstract translation: 集成电路芯片包括其上具有多个IMD层的半导体衬底和嵌入IMD层中的第一导电层; 覆盖IMD层和第一导电层的第一绝缘层; 在覆盖所述第一绝缘层的第二导电层中的多个第一电源/接地网状布线，用于分配电力信号或接地信号; 以及覆盖所述第二导电层和所述第一绝缘层的第二绝缘层。

公开(公告)号：US08117208B2

公开(公告)日：2012-02-14

申请号：US12233812

申请日：2008-09-19

Applicant: Kevin Chen-Chuan Chang ,  Tao Cheng ,  Xifeng Yan

Inventor： Kevin Chen-Chuan Chang ,  Tao Cheng ,  Xifeng Yan

IPC: G06F7/00 ,  G06F17/30

CPC classification number: G06F17/30867

Abstract: A system has a processor coupled to access a document database that indexes keywords and instances of entities having entity types in a plurality of documents. The processor is programmed to receive an input query including one or more keywords and one or more entity types, and search the database for documents having the keywords and entities with the entity types of the input query. The processor is programmed for aggregating a respective score for each of a plurality of entity tuples across the plurality of documents. The aggregated scores are normalized. Each respective normalized score provides a ranking of a respective entity tuple, relative to other entity tuples, as an answer to the input query. The processor has an interface to a storage or display device or network for outputting a list including a subset of the entity tuples having the highest normalized scores among the plurality of entity tuples.

Abstract translation: 系统具有处理器，其耦合到访问文档数据库，所述文档数据库在多个文档中对具有实体类型的关键字和实体的实例进行索引。 处理器被编程为接收包括一个或多个关键字和一个或多个实体类型的输入查询，并且搜索数据库中具有关键词和具有输入查询的实体类型的实体的文档。 处理器被编程用于聚集跨多个文档的多个实体元组中的每一个的相应分数。 综合得分归一化。 每个相应的归一化分数提供相对于其他实体元组的相应实体元组作为输入查询的答案的排序。 处理器具有到存储或显示设备或网络的接口，用于输出包括多个实体元组中具有最高归一化分数的实体元组的子集的列表。