Invention Grant
- Patent Title: Semiconductor device capable of reducing influences of adjacent word lines or adjacent transistors and fabricating method thereof
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Application No.: US14641439Application Date: 2015-03-09
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Publication No.: US09214571B2Publication Date: 2015-12-15
- Inventor: Shian-Jyh Lin
- Applicant: NANYA TECHNOLOGY CORP.
- Applicant Address: TW Gueishan Dist., Taoyuan
- Assignee: NANYA TECHNOLOGY CORP.
- Current Assignee: NANYA TECHNOLOGY CORP.
- Current Assignee Address: TW Gueishan Dist., Taoyuan
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/108

Abstract:
A semiconductor device capable of reducing influences of adjacent word lines is provided in the present invention. The semiconductor device includes: a substrate, and a word line disposed in the substrate. The word line includes: a gate electrode, a gate dielectric layer disposed between the gate electrode and the substrate and at least one first charge trapping dielectric layer disposed adjacent to the gate electrode, wherein the first charge trapping dielectric layer comprises HfO2, TiO2, ZrO2, a germanium nanocrystal layer, an organic charge trapping material, HfSiOxNy, or MoSiOqNz.
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