Invention Grant
- Patent Title: Management of caches
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Application No.: US13957105Application Date: 2013-08-01
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Publication No.: US09251081B2Publication Date: 2016-02-02
- Inventor: Kai K. Chang , Yasuko Eckert , Gabriel H. Loh , Lisa R. Hsu
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Rory D. Rankin
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/12

Abstract:
A system and method for efficiently powering down banks in a cache memory for reducing power consumption. A computing system includes a cache array and a corresponding cache controller. The cache array includes multiple banks, each comprising multiple cache sets. In response to a request to power down a first bank of the multiple banks in the cache array, the cache controller selects a cache line of a given type in the first bank and determines whether a respective locality of reference for the selected cache line exceeds a threshold. If the threshold is exceeded, then the selected cache line is migrated to a second bank in the cache array. If the threshold is not exceeded, then the selected cache line is written back to lower-level memory.
Public/Granted literature
- US20150039833A1 Management of caches Public/Granted day:2015-02-05
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