- Patent Title: Package substrate and die spacer layers having a ceramic backbone
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Application No.: US13987701Application Date: 2013-08-22
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Publication No.: US09258880B2Publication Date: 2016-02-09
- Inventor: Aleksandar Aleksov , Vladimir Noveski , Sujit Sharan , Shankar Ganapathysubramanian
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H05H1/02
- IPC: H05H1/02 ; H05K1/02 ; H01L21/48 ; H01L23/15 ; H01L23/498 ; H05K3/46 ; H05K1/03 ; H05K3/06 ; H05K3/10 ; H05K3/20 ; H05K3/38
Abstract:
A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material.
Public/Granted literature
- US20130341076A1 Package substrate and die spacer layers having a ceramic backbone Public/Granted day:2013-12-26
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