Invention Grant
- Patent Title: Low read current architecture for memory
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Application No.: US14254209Application Date: 2014-04-16
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Publication No.: US09368200B2Publication Date: 2016-06-14
- Inventor: Bruce Lynn Bateman , Christophe Chevallier , Darrell Rinerson , Chang Hua Siau
- Applicant: Unity Semiconductor Corporation
- Applicant Address: US CA Sunnyvale
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C13/00 ; G11C7/12 ; G11C7/22
Abstract:
A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.
Public/Granted literature
- US20140334222A1 LOW READ CURRENT ARCHITECTURE FOR MEMORY Public/Granted day:2014-11-13
Information query
