Invention Grant
- Patent Title: Method and apparatus related to cache memory
- Patent Title (中): 与缓存相关的方法和装置
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Application No.: US13942291Application Date: 2013-07-15
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Publication No.: US09552301B2Publication Date: 2017-01-24
- Inventor: Zhe Wang , Junli Gu , Yi Xu
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Polansky & Associates, P.L.L.C.
- Agent Paul J. Polansky
- Main IPC: G06F12/12
- IPC: G06F12/12 ; G06F12/08

Abstract:
A cache includes a cache array and a cache controller. The cache array has a plurality of entries. The cache controller is coupled to the cache array. The cache controller evicts entries from the cache array according to a cache replacement policy. The cache controller evicts a first cache line from the cache array by generating a writeback request for modified data from the first cache line, and subsequently generates a writeback request for modified data from a second cache line if the second cache line is about to satisfy the cache replacement policy and stores data from a common locality as the first cache line.
Public/Granted literature
- US20150019823A1 METHOD AND APPARATUS RELATED TO CACHE MEMORY Public/Granted day:2015-01-15
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