Invention Grant
- Patent Title: Fan-out wafer-level packaging using metal foil lamination
-
Application No.: US14877205Application Date: 2015-10-07
-
Publication No.: US09646946B2Publication Date: 2017-05-09
- Inventor: Xuan Li , Rajesh Katkar , Long Huynh , Laura Wills Mirkarimi , Bongsub Lee , Gabriel Z. Guevara , Tu Tam Vu , Kyong-Mo Bang , Akash Agrawal
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L29/40 ; H01L21/84 ; H01L23/00 ; H01L21/02 ; H01L21/683 ; H01L21/768 ; H01L21/56 ; H01L21/304 ; H01L23/538 ; H01L23/29

Abstract:
Fan-out wafer-level packaging (WLP) using metal foil lamination is provided. An example wafer-level package incorporates a metal foil, such as copper (Cu), to relocate bonding pads in lieu of a conventional deposited or plated RDL. A polymer such as an epoxy layer adheres the metal foil to the package creating conductive contacts between the metal foil and metal pillars of a die. The metal foil may be patterned at different stages of a fabrication process. An example wafer-level package with metal foil provides relatively inexpensive electroplating-free traces that replace expensive RDL processes. Example techniques can reduce interfacial stress at fan-out areas to enhance package reliability, and enable smaller chips to be used. The metal foil provides improved fidelity of high frequency signals. The metal foil can be bonded to metallic pillar bumps before molding, resulting in less impact on the mold material.
Public/Granted literature
- US20170103957A1 FAN-OUT WAFER-LEVEL PACKAGING USING METAL FOIL LAMINATION Public/Granted day:2017-04-13
Information query
IPC分类: