Invention Grant
- Patent Title: Image sensor pixel with memory node having buried channel and diode portions formed on N-type substrate
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Application No.: US15658328Application Date: 2017-07-24
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Publication No.: US09865632B2Publication Date: 2018-01-09
- Inventor: Assaf Lahav , Amos Fenigstein , Yakov Roizin , Avi Strum
- Applicant: Tower Semiconductor Ltd.
- Applicant Address: IL Migdal Haemek
- Assignee: Tower Semiconductor Ltd.
- Current Assignee: Tower Semiconductor Ltd.
- Current Assignee Address: IL Migdal Haemek
- Agency: Bever, Hoffman & Harms, LLP
- Main IPC: H04N5/335
- IPC: H04N5/335 ; H01L27/146 ; H04N5/353 ; H04N5/3745

Abstract:
A global shutter image sensor formed on an n-type bulk substrate and including pixels having pinned n-type photodiodes and memory nodes formed in designated n-doped epitaxial layer regions that are separated from the bulk substrate by a p-type vertical (potential) barrier implant. Each memory node includes both a buried channel portion and a contiguous pinned diode portion having different doping levels such that an intrinsic lateral electrical field drives electrons from the buried channel portion into the pinned diode portion during global charge transfer from an adjacent photodiode. The p-type vertical (potential) barrier implant is coupled to ground, and the bulk substrate is switched between a low integration voltage level during integration periods, and a high reset voltage level, whereby the photodiodes are globally reset without requiring reset transistors. P-type sinker implant sections and p-type vertical barrier implants form box-like diffusions around each pixel's photodiode and memory node.
Public/Granted literature
- US20170323912A1 Image Sensor Pixel With Memory Node Having Buried Channel And Diode Portions Formed On N-Type Substrate Public/Granted day:2017-11-09
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