A packaging process of a semiconductor device includes following steps. A patterned conductive layer and a solder resist layer that covers the patterned conductive layer are formed through 3D-printing over a carrier having a cavity. The patterned conductive layer and the solder resist layer extend to the outside of the cavity from the inside of the cavity. One portion of the patterned conductive layer is exposed by the solder resist layer. At least one semiconductor device is mounted on the patterned conductive layer in the cavity, such that the at least one semiconductor device is electrically connected to the patterned conductive layer.