公开(公告)号：WO2015134175A1

公开(公告)日：2015-09-11

申请号：PCT/US2015/015779

申请日：2015-02-13

Applicant: APPLE INC.

Inventor： MYLIUS, John H. ,  ZIESLER, Conrad H. ,  MURRAY, Daniel C. ,  LEE, Jong-Suk ,  KUMAR, Rohit

IPC: G06F1/32

CPC classification number: G06F1/3209 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

Abstract translation: 在一个实施例中，集成电路包括组件（例如处理器）和控制电路的多个实例。 这些实例可以被配置为以各种模式操作。 一些模式不能在电源上呈现最坏的负载。 控制电路可以被配置为监视实例并检测实例正在操作的模式。 基于监视，控制电路可以请求恢复在实例中为最坏情况条件建立的电压余量的一部分。 如果实例要改变模式，则它们可以被配置为从控制电路请求模式改变。 如果模式改变导致当前电源电压幅度的增加（例如，恢复一些恢复的电压余量），则控制电路可以在授予模式改变之前导致恢复并允许其恢复。

公开(公告)号：WO2015013080A1

公开(公告)日：2015-01-29

申请号：PCT/US2014/046865

申请日：2014-07-16

Applicant: APPLE INC.

Inventor： RAGHUVANSHI, Pankaj ,  KUMAR, Rohit ,  PERIYACHERI, Suresh

IPC: G06F1/32 ,  G06F9/38

CPC classification number: G06F1/3234 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/3836 ,  G06F9/4893 ,  Y02D10/152 ,  Y02D10/171 ,  Y02D10/24

Abstract: An apparatus for performing instruction throttling for a computing system is disclosed. The apparatus may include a first counter, a second counter, and a control circuit. The second counter may be configured to increment in response to a determination that a processing cycle of a processor has completed. The control circuit may be configured to initialize the first and second counters, detect the processor has issued and instruction, decrement the first counter in response to the detection of the issued instruction, block the processor from issuing instructions dependent upon the a value of the first counter, reset the first counter dependent upon a value of the second counter, and reset the second counter in response to a determination that the value of the second counter is greater than a pre-determined value.

Abstract translation: 公开了一种用于对计算系统执行指令调节的装置。 该装置可以包括第一计数器，第二计数器和控制电路。 第二计数器可以被配置为响应于处理器的处理周期的确定已经完成而递增。 控制电路可以被配置为初始化第一和第二计数器，检测处理器已经发出和指令，响应于所发出的指令的检测而减小第一计数器，阻止处理器发出指令，取决于第一和第二计数器的值 计数器，根据第二计数器的值复位第一计数器，并且响应于第二计数器的值大于预定值的确定而复位第二计数器。

公开(公告)号：WO2015023422A1

公开(公告)日：2015-02-19

申请号：PCT/US2014/048426

申请日：2014-07-28

Applicant: APPLE INC.

Inventor： KUMAR, Rohit

IPC: G06F1/10

CPC classification number: H03K3/012 ,  G06F1/10

Abstract: A clock distribution network (clock tree 12) having a separate power supply (14) for top levels (L1-L6) thereof is disclosed. In one embodiment, an integrated circuit includes a clock distribution network (12) configured to distribute a clock signal (Clk) to each of a number of clock consumers. The clock distribution network is arranged in a hierarchy of levels (L1-L12), with each of the levels including at least one buffer, and with the upper levels (L1-L6) being closer to a source of the clock signal and the lower levels (L7-L12) being closer to the clock consumers. The buffers of the upper levels (L1-L6) are coupled to receive power from a first power source (14), via a first power grid (16). The buffers of the lower levels (L7-L12) are coupled to receive power from a second power source (Vdd), separate from the first, via a second power grid (18).

Abstract translation: 公开了一种具有用于顶级（L1-L6）的单独电源（14）的时钟分配网络（时钟树12）。 在一个实施例中，集成电路包括配置成将时钟信号（Clk）分配给多个时钟消费者中的每一个的时钟分配网络（12）。 时钟分配网络被布置在层级（L1-L12）中，其中每个级别包括至少一个缓冲器，并且上级（L1-L6）更接近时钟信号的源，而较低级 级别（L7-L12）更接近时钟消费者。 上层（L1-L6）的缓冲器经由第一电网（16）被耦合以从第一电源（14）接收电力。 低电平（L7-L12）的缓冲器被耦合以经由第二电网（18）从与第一电源分离的第二电源（Vdd）接收电力。

公开(公告)号：WO2014209490A1

公开(公告)日：2014-12-31

申请号：PCT/US2014/036012

申请日：2014-04-30

Applicant: APPLE INC.

Inventor： KNOTH, Matthias ,  KUMAR, Rohit ,  SMITH, Eric ,  LUH, Louis

IPC: H02J1/02

CPC classification number: G06F1/26 ,  H02J1/02 ,  H02J1/10 ,  H02J7/345 ,  Y10T307/527

Abstract: In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

Abstract translation: 在一些实施例中，系统可以包括至少一个电压控制器。 至少一个电压控制器可以在使用期间评估预定条件的发生。 在一些实施例中，系统可以包括至少第一电容器。 至少第一电容器可以耦合到至少一个电压控制器，使得当预定条件发生时，至少一个电压控制器接合至少第一电容器以提供附加电流。 当电流的增加不再需要时，可以使至少第一电容器分离。 至少第一电容器可以在分离直到预定容量时被充电。

公开(公告)号：EP3077887B1

公开(公告)日：2020-05-13

申请号：EP15708950.9

申请日：2015-02-13

Applicant: Apple Inc.

Inventor： MYLIUS, John H. ,  ZIESLER, Conrad H. ,  MURRAY, Daniel C. ,  LEE, Jong-Suk ,  KUMAR, Rohit

IPC: G06F1/3296 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/324

公开(公告)号：EP2987216A1

公开(公告)日：2016-02-24

申请号：EP14728380.8

申请日：2014-04-30

Applicant: Apple Inc.

Inventor： KNOTH, Matthias ,  KUMAR, Rohit ,  SMITH, Eric ,  LUH, Louis

IPC: H02J1/02

CPC classification number: G06F1/26 ,  H02J1/02 ,  H02J1/10 ,  H02J7/345 ,  Y10T307/527

Abstract: In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

公开(公告)号：EP2987216B1

公开(公告)日：2018-03-21

申请号：EP14728380.8

申请日：2014-04-30

Applicant: Apple Inc.

Inventor： KNOTH, Matthias ,  KUMAR, Rohit ,  SMITH, Eric ,  LUH, Louis

IPC: H02J1/02

CPC classification number: G06F1/26 ,  H02J1/02 ,  H02J1/10 ,  H02J7/345 ,  Y10T307/527

Abstract: In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.

公开(公告)号：EP3077887A1

公开(公告)日：2016-10-12

申请号：EP15708950.9

申请日：2015-02-13

Applicant: Apple Inc.

Inventor： MYLIUS, John H. ,  ZIESLER, Conrad H. ,  MURRAY, Daniel C. ,  LEE, Jong-Suk ,  KUMAR, Rohit

IPC: G06F1/32

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

Abstract translation: 在一个实施例中，集成电路包括组件（例如处理器）和控制电路的多个实例。 这些实例可以被配置为以各种模式操作。 一些模式不能在电源上呈现最坏的负载。 控制电路可以被配置为监视实例并检测实例正在操作的模式。 基于监视，控制电路可以请求恢复在实例中为最坏情况条件建立的电压余量的一部分。 如果实例要改变模式，则它们可以被配置为从控制电路请求模式改变。 如果模式改变导致当前电源电压幅度的增加（例如，以恢复一些恢复的电压裕度），则控制电路可以在授予模式改变之前导致恢复并允许其恢复。