公开(公告)号：EP4006972A2

公开(公告)日：2022-06-01

申请号：EP22150527.4

申请日：2014-07-29

Applicant: Apple Inc.

Inventor： ZERBE, Jared L. ,  FANG, Emerson S. ,  ZHAI, Jun ,  SEARLES, Shawn

IPC: H01L25/16 ,  H01L23/64 ,  H01G4/228 ,  H01L23/13 ,  H01L25/18 ,  H01L25/065

Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device (120) may include one or more current consuming elements. A passive device (100) may be coupled (110) to the power consuming device. The passive device includes a plurality of passive elements formed on a semiconductor substrate. The passive elements are arranged in an array of structures (102) on the semiconductor substrate. The power consuming device and the passive device are coupled using one or more terminals (110). The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.

公开(公告)号：EP4006972A3

公开(公告)日：2022-12-28

申请号：EP22150527.4

申请日：2014-07-29

Applicant: Apple Inc.

Inventor： ZERBE, Jared L. ,  FANG, Emerson S. ,  ZHAI, Jun ,  SEARLES, Shawn

IPC: H01L25/16 ,  H01L23/64 ,  H01G4/228 ,  H01G4/232 ,  H01L49/02 ,  H01L23/13 ,  H01L25/18 ,  H01L25/065

Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device (120) may include one or more current consuming elements. A passive device (100) may be coupled (110) to the power consuming device. The passive device includes a plurality of passive elements formed on a semiconductor substrate. The passive elements are arranged in an array of structures (102) on the semiconductor substrate. The power consuming device and the passive device are coupled using one or more terminals (110). The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.

公开(公告)号：WO2020242864A1

公开(公告)日：2020-12-03

申请号：PCT/US2020/033857

申请日：2020-05-20

Applicant: APPLE INC.

Inventor： HSU, Jun Chung ,  CHUNG, Chih-Ming ,  ZHAI, Jun ,  KAO, Yifan ,  JEON, Young Doo ,  KIM, Taegui

IPC: H01L21/48 ,  H01L23/498

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

公开(公告)号：WO2016140818A2

公开(公告)日：2016-09-09

申请号：PCT/US2016/018801

申请日：2016-02-19

Applicant: APPLE INC.

Inventor： CHUNG, Chih-Ming ,  ZHAI, Jun ,  YANG, Yizhang

IPC: H01L23/552 ,  H01L23/538 ,  H01L21/60 ,  H01L23/34 ,  H01L25/16

CPC classification number: H01L25/18 ,  H01L21/565 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3107 ,  H01L23/34 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/14 ,  H01L24/19 ,  H01L24/32 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/92225 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2224/81

Abstract: Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die between the first and second RDLs, and conductive pillars extending between the RDLs. A molding compound may encapsulate the stacked die and conductive pillars between the first and second RDLs.

Abstract translation: 描述了包装和形成方法。 在一个实施例中，封装系统（SiP）包括第一和第二再分配层（RDL），第一和第二RDL之间的堆叠管芯，以及在RDL之间延伸的导电柱。 模塑料可以将堆叠的管芯和导电柱塞在第一和第二RDL之间。

公开(公告)号：WO2015031030A1

公开(公告)日：2015-03-05

申请号：PCT/US2014/050312

申请日：2014-08-08

Applicant: APPLE INC.

Inventor： HSU, Jun, Chung ,  ZHAI, Jun

IPC: H01L23/13 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/13 ,  H01L21/4857 ,  H01L21/76802 ,  H01L23/12 ,  H01L23/481 ,  H01L23/49822 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/19106 ,  H01L2924/00

Abstract: A bottom package for a PoP (package-on-package) may be formed with a reinforcement layer supporting a thin or coreless substrate. The reinforcement layer may provide stiffness and rigidity to the substrate to increase the stiffness and rigidity of the bottom package and provide better handling of the substrate. The reinforcement layer may be formed using core material, a laminate layer, and a metal layer. The substrate may be formed on the reinforcement layer. The reinforcement layer may include an opening sized to accommodate a die. The die may be coupled to an exposed surface of the substrate in the opening. Metal filled vias through the reinforcement layer may be used to couple the substrate to a top package.

Abstract translation: 用于PoP（封装封装）的底部封装可以形成有支撑薄的或无芯的衬底的加强层。 加强层可以为基底提供刚度和刚度，以增加底部包装的刚度和刚性，并提供更好的基底处理。 加强层可以使用芯材，层压层和金属层形成。 衬底可以形成在加强层上。 加强层可以包括尺寸适于容纳模具的开口。 裸片可以在开口中耦合到衬底的暴露表面。 通过加强层的金属填充的通孔可以用于将衬底耦合到顶部封装。

公开(公告)号：WO2014120484A1

公开(公告)日：2014-08-07

申请号：PCT/US2014/012072

申请日：2014-01-17

Applicant: APPLE INC.

Inventor： ZHAI, Jun

IPC: H01L25/03 ,  H01L23/00

CPC classification number: H01L23/498 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/03 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/0665

Abstract: A top package (100) used in a PoP (package-on-package) package includes two memory dies (102A, 102B) stacked with a redistribution layer (RDL) between the die. The first memory die (102A) is encapsulated in an encapsulant (104) and coupled to a top surface of the RDL (106). A second memory die (102B) is coupled to a bottom surface of the RDL. The second memory die is coupled to the RDL with either a capillary underfill material or a non-conductive paste. The RDL includes routing between each of the memory die and one or more terminals (112A, 112B) coupled to the RDL on a periphery of the die.

Abstract translation: 在PoP（封装封装）封装中使用的顶部封装（100）包括在管芯之间堆叠有再分配层（RDL）的两个存储器管芯（102A，102B）。 第一存储器管芯（102A）被封装在密封剂（104）中并且耦合到RDL（106）的顶表面。 第二存储器管芯（102B）耦合到RDL的底表面。 第二个存储器管芯使用毛细管底部填充材料或非导电浆料连接到RDL。 RDL包括在每个存储管芯与在管芯外围连接到RDL的一个或多个端子（112A，112B）之间的布线。

公开(公告)号：EP4235777A3

公开(公告)日：2024-02-28

申请号：EP23177407.6

申请日：2021-02-10

Applicant: Apple Inc.

Inventor： CHEN, Wei ,  ZHAO, Jie-Hua ,  ZHAI, Jun ,  CHANG, CHANG ,  LIN, Hsien-Che ,  KE, Ying-Chieh ,  HU, Kunzhong

IPC: H01L23/04 ,  H01L23/16 ,  H01L23/367 ,  H01L25/065 ,  H01L23/42 ,  H01L25/03

Abstract: Multiple chip module (MCM) structures are described. In an embodiment, a module includes a first and second components on the top side of a module substrate, a stiffener structure mounted on the top side of the module substrate, and a lid mounted on the stiffener structure and covering the first component and the second component. The stiffener is joined to the lid within a trench formed in a roof of the lid.

公开(公告)号：EP3031081A2

公开(公告)日：2016-06-15

申请号：EP14758191.2

申请日：2014-07-29

Applicant: Apple Inc.

Inventor： ZERBE, Jared L. ,  FANG, Emerson S. ,  ZHAI, Jun ,  SEARLES, Shawn

IPC: H01L25/16 ,  H01L23/64 ,  H01G4/228 ,  H01L23/13 ,  H01L25/18 ,  H01L25/065

CPC classification number: H01L27/101 ,  H01G4/228 ,  H01L23/13 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/18 ,  H01L28/40 ,  H01L2224/0401 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/1033 ,  H01L2924/12042 ,  H01L2924/1205 ,  H01L2924/1427 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.

Abstract translation: 描述了包括电力消耗装置（诸如SOC装置）的半导体器件封装。 功耗设备可以包括一个或多个电流消耗元件。 无源设备可以耦合到功率消耗设备。 无源器件可以包括形成在半导体衬底上的多个无源元件。 无源元件可以布置在半导体衬底上的结构阵列中。 功率消耗装置和无源装置可以使用一个或多个终端来耦合。 无源器件和功率消耗器件耦合可以被配置成使得功率消耗器件功能地确定无源器件元件将被使用的方式。

公开(公告)号：EP4235777A2

公开(公告)日：2023-08-30

申请号：EP23177407.6

申请日：2021-02-10

Applicant: Apple Inc.

Inventor： CHEN, Wei ,  ZHAO, Jie-Hua ,  ZHAI, Jun ,  CHANG, CHANG ,  LIN, Hsien-Che ,  KE, Ying-Chieh ,  HU, Kunzhong

IPC: H01L25/065

Abstract: Multiple chip module (MCM) structures are described. In an embodiment, a module includes a first and second components on the top side of a module substrate, a stiffener structure mounted on the top side of the module substrate, and a lid mounted on the stiffener structure and covering the first component and the second component. The stiffener is joined to the lid within a trench formed in a roof of the lid.

公开(公告)号：EP4128332A1

公开(公告)日：2023-02-08

申请号：EP21711077.4

申请日：2021-02-10

Applicant: Apple Inc.

Inventor： CHEN, Wei ,  ZHAO, Jie-Hua ,  ZHAI, Jun ,  CHANG, Po-Hao ,  LIN, Hsien-Che ,  KE, Ying-Chieh ,  HU, Kunzhong

IPC: H01L23/04 ,  H01L23/16 ,  H01L23/367 ,  H01L25/065