公开(公告)号：WO2014052273A1

公开(公告)日：2014-04-03

申请号：PCT/US2013/061316

申请日：2013-09-24

Applicant: APPLE INC.

Inventor： ZHAO, Jie-Hua ,  YANG, Yizhang ,  ZHAI, Jun ,  CHUNG, Chih-Ming

IPC: H01L25/10 ,  H01L25/00

CPC classification number: H01L25/50 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/37001 ,  Y02P80/30 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A PoP (package-on-package) package includes a bottom package coupled to a top package. Terminals on the top of the bottom package are coupled to terminals on the bottom of the top package with an electrically insulating material located between the upper surface of the bottom package and the lower surface of the top package. The bottom package and the top package are coupled during a process that applies force to bring the packages together while heating the packages.

Abstract translation: PoP（封装封装）封装包括一个耦合到顶部封装的底部封装。 底部封装顶部的端子通过位于底部封装的上表面和顶部封装的下表面之间的电绝缘材料耦合到顶部封装的底部上的端子。 底部包装和顶部包装在加工包装的过程中被联接，该过程中施加力以使包装在一起。

公开(公告)号：WO2014116538A1

公开(公告)日：2014-07-31

申请号：PCT/US2014/012198

申请日：2014-01-20

Applicant: APPLE INC.

Inventor： CHUNG, Chih-Ming

IPC: H01L23/29 ,  H01L23/31 ,  H01L23/42 ,  H01L23/00 ,  H01L25/10

CPC classification number: H01L23/34 ,  H01L21/56 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/562 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: In some embodiments, a semiconductor device package assembly may include a substrate. The substrate (110) may include a first surface, a second surface substantially opposite of the first surface, and a first set of electrical conductors (140) coupled to the first surface. The first set of electrical conductors may function to electrically connect the substrate. The second surface may include a die (150) electrically coupled to the second surface. In some embodiments, the semiconductor device package may include an electrically insulating material (160) covering at least a portion of the second surface and the die. The electrically insulating material may include a dielectric polymer. The dielectric polymer may function to inhibit deformation of the package during use. The dielectric polymer may include a coefficient of thermal expansion of between about 5 to about 15 ppm/°C. The dielectric polymer may include a modulus of between about 15 to about 25 Gpa.

Abstract translation: 在一些实施例中，半导体器件封装组件可以包括衬底。 衬底（110）可以包括第一表面，与第一表面基本相反的第二表面，以及耦合到第一表面的第一组电导体（140）。 第一组电导体可以用于电连接衬底。 第二表面可以包括电耦合到第二表面的管芯（150）。 在一些实施例中，半导体器件封装可以包括覆盖第二表面和管芯的至少一部分的电绝缘材料（160）。 电绝缘材料可以包括电介质聚合物。 介电聚合物可用于在使用期间抑制包装的变形。 介电聚合物可以包括约5至约15ppm /℃的热膨胀系数。 介电聚合物可以包括约15至约25Gpa的模量。

公开(公告)号：WO2020242864A1

公开(公告)日：2020-12-03

申请号：PCT/US2020/033857

申请日：2020-05-20

Applicant: APPLE INC.

Inventor： HSU, Jun Chung ,  CHUNG, Chih-Ming ,  ZHAI, Jun ,  KAO, Yifan ,  JEON, Young Doo ,  KIM, Taegui

IPC: H01L21/48 ,  H01L23/498

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

公开(公告)号：WO2016140818A2

公开(公告)日：2016-09-09

申请号：PCT/US2016/018801

申请日：2016-02-19

Applicant: APPLE INC.

Inventor： CHUNG, Chih-Ming ,  ZHAI, Jun ,  YANG, Yizhang

IPC: H01L23/552 ,  H01L23/538 ,  H01L21/60 ,  H01L23/34 ,  H01L25/16

CPC classification number: H01L25/18 ,  H01L21/565 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3107 ,  H01L23/34 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/14 ,  H01L24/19 ,  H01L24/32 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/92225 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2224/81

Abstract: Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die between the first and second RDLs, and conductive pillars extending between the RDLs. A molding compound may encapsulate the stacked die and conductive pillars between the first and second RDLs.

Abstract translation: 描述了包装和形成方法。 在一个实施例中，封装系统（SiP）包括第一和第二再分配层（RDL），第一和第二RDL之间的堆叠管芯，以及在RDL之间延伸的导电柱。 模塑料可以将堆叠的管芯和导电柱塞在第一和第二RDL之间。

公开(公告)号：WO2014028670A1

公开(公告)日：2014-02-20

申请号：PCT/US2013/055018

申请日：2013-08-14

Applicant: APPLE INC.

Inventor： CHUNG, Chih-Ming

IPC: H01L23/31 ,  H01L25/10

CPC classification number: H01L23/315 ,  H01L21/565 ,  H01L21/566 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00

Abstract: A PoP (package-on-package) package includes a bottom package with a substrate encapsulated in an encapsulant with a die coupled to the top of the substrate. At least a portion of the die is exposed above the encapsulant on the bottom package substrate. A top package includes a substrate with encapsulant on both the frontside and the backside of the substrate. The backside of the top package substrate is coupled to the topside of the bottom package substrate with at least part of the die being located in a recess in the encapsulant on the backside of the top package substrate.

Abstract translation: PoP（封装封装）封装包括底部封装，其具有封装在具有与基板顶部耦合的管芯的密封剂中的基板。 裸片的至少一部分暴露在底部封装衬底上的密封剂上方。 顶部封装包括在衬底的前侧和后侧上具有密封剂的衬底。 顶部封装衬底的背面耦合到底部封装衬底的顶侧，其中模具的至少一部分位于封装材料的位于顶部封装衬底背面的凹槽中。

公开(公告)号：EP2885812B1

公开(公告)日：2018-07-25

申请号：EP13751078.0

申请日：2013-08-14

Applicant: Apple Inc.

Inventor： CHUNG, Chih-Ming

IPC: H01L23/31 ,  H01L25/10

CPC classification number: H01L23/315 ,  H01L21/565 ,  H01L21/566 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00

Abstract: A PoP (package-on-package) package includes a bottom package with a substrate encapsulated in an encapsulant with a die coupled to the top of the substrate. At least a portion of the die is exposed above the encapsulant on the bottom package substrate. A top package includes a substrate with encapsulant on both the frontside and the backside of the substrate. The backside of the top package substrate is coupled to the topside of the bottom package substrate with at least part of the die being located in a recess in the encapsulant on the backside of the top package substrate.

公开(公告)号：EP2885812A1

公开(公告)日：2015-06-24

申请号：EP13751078.0

申请日：2013-08-14

Applicant: Apple Inc.

Inventor： CHUNG, Chih-Ming

IPC: H01L23/31 ,  H01L25/10

CPC classification number: H01L23/315 ,  H01L21/565 ,  H01L21/566 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/81 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00

Abstract: A PoP (package-on-package) package includes a bottom package with a substrate encapsulated in an encapsulant with a die coupled to the top of the substrate. At least a portion of the die is exposed above the encapsulant on the bottom package substrate. A top package includes a substrate with encapsulant on both the frontside and the backside of the substrate. The backside of the top package substrate is coupled to the topside of the bottom package substrate with at least part of the die being located in a recess in the encapsulant on the backside of the top package substrate.