公开(公告)号：JPH07184367A

公开(公告)日：1995-07-21

申请号：JP8430594

申请日：1994-04-22

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA ,  SUTEFUAANO SERI ,  DONATO TARIIBIA

IPC: G05F1/56 ,  H02M1/08 ,  H03K17/00 ,  H03K17/08 ,  H03K17/16 ,  H03K17/64

Abstract: PURPOSE: To provide a control circuit for slowing tuning off a semiconductor power transistor, especially for inductive loads. CONSTITUTION: This control circuit possesses means R1, R2, and 18 for limiting the load current flowing to the switch, and clocking and control circuits 11, 12, and 13, and guarantees to turn off a switch slowly with a specified delay, when it reaches the maximum load current value regardless of the duration of command pulses, whereby it keeps the power diffusion through the switch in load current limiting phase, moreover keeps the turn off overvoltage on or under a specified level.