公开(公告)号：JPH07184367A

公开(公告)日：1995-07-21

申请号：JP8430594

申请日：1994-04-22

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA ,  SUTEFUAANO SERI ,  DONATO TARIIBIA

IPC: G05F1/56 ,  H02M1/08 ,  H03K17/00 ,  H03K17/08 ,  H03K17/16 ,  H03K17/64

Abstract: PURPOSE: To provide a control circuit for slowing tuning off a semiconductor power transistor, especially for inductive loads. CONSTITUTION: This control circuit possesses means R1, R2, and 18 for limiting the load current flowing to the switch, and clocking and control circuits 11, 12, and 13, and guarantees to turn off a switch slowly with a specified delay, when it reaches the maximum load current value regardless of the duration of command pulses, whereby it keeps the power diffusion through the switch in load current limiting phase, moreover keeps the turn off overvoltage on or under a specified level.

公开(公告)号：JPH07221120A

公开(公告)日：1995-08-18

申请号：JP31742292

申请日：1992-11-26

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA

IPC: H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L29/08 ,  H01L29/73 ,  H01L29/732

Abstract: PURPOSE: To provide a monolithic semiconductor device having a vertical structure with a deep-base and a finger-emitter power transistor having a ballast resistance. CONSTITUTION: This semiconductor device is provided with an epitaxial layer 2 placed one after another on a substrate 3, a base area completed on the epitaxial layer and at least one emitter area 6 for a buried layer for each finger provided with at least one connection area 11 between an emitter and an emitter surface metallization 8, an emitter contact connected to the emitter surface metallization of all fingers, a base and a collector surface metallization 5. At least on connection area 11 existing between at least one emitter area 6 and the emitter surface metallization 8 is formed so as to have a width which provides a proper ballast resistance value(Rv).

公开(公告)号：JPH07169774A

公开(公告)日：1995-07-04

申请号：JP14507894

申请日：1994-06-27

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/73 ,  H01L29/732

Abstract: PURPOSE: To provide a vertical bipolar power transistor which gains high current and shows an operating region of high safety by connecting an emitter region, put by between an emitter interconnect region and perimeter, to a opposite conductivity type screen region, and a mutually connected region to a contact region of the same conductivity type, extending to the outer periphery. CONSTITUTION: A vertical bipolar transistor is provided with a P-type base region 13 embedded in an N-type semiconductor material, an embedded N - emitter region 14, a P with deep contact base region 15 and N interconnected regions 16 and 17 which extend from the surface to the emitter region 14 and form balance ballast resistance of the emitter. A P-type screen region 22 extends from the surface to the region 14 formed into interdigital form, and put among each interconnected region 16 and 17, and the outer periphery of the emitter region 14, and connected to a contact region 17A, extending from the surface to the outer peripheral part of the emitter region 14, with a conductive contact means 23 at the surface.

公开(公告)号：JPH07142621A

公开(公告)日：1995-06-02

申请号：JP12786194

申请日：1994-06-09

Applicant: CONS RIC MICROELETTRONICA

Inventor： SERUJIO PARAARA

IPC: H01L27/06 ,  H01L21/8249 ,  H01L27/07 ,  H01L29/78

Abstract: PURPOSE: To provide a monolithic integrated device, including a bipolar transistor and a field effect transistor which have low series resistance at the time of electric conduction. CONSTITUTION: The vertical bipolar transistor consists of a collector region formed on an N* base body 10 and an N -epitaxial layer 11 on it, a base region 13 formed of a P-type embedded region, and an emitter region 14 formed of an N*-embedded region on it, and a MOSFET transistor consists of a drain region formed of an N -base body 10, an N-epitaxial layer 12 on it, and an N-epitaxial layer 12, a channel region formed of P-type regions 20 and 23, and a source region formed of an N -region. The collector region of the bipolar transistor and the drain region of the MOSFET transistor are adjacent to each other and of the same conduction type, so that the conductivity of the drain region is lowered under the effects of the conduction state of the bipolar transistor.

公开(公告)号：JPH08304480A

公开(公告)日：1996-11-22

申请号：JP10553396

申请日：1996-04-25

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： SERUJIO PARAARA ,  SUTEFUANO SUEERI ,  SARUBUATOORE SUKATSUCHIANOOCHI

IPC: G01R19/165 ,  F02P17/12 ,  G01R29/027 ,  H01T13/60 ,  H02H3/08 ,  H02H3/20

Abstract: PROBLEM TO BE SOLVED: To detect an overload of an electric load inserted between a feeder line and a control switch accurately by providing a feedback block, being inserted along with input and output terminals, between the output terminal of a circuit and the input terminal of a following logic block. SOLUTION: A circuit 1 detects an overload of an electric load Z1 inserted between a feeder line AL and a control switch S and includes a feedback block R, being inserted along with input and output terminals, between the output terminal OUT and the input of a following logic block D. The block D also includes an OR type logic gate P1 and an AND type logic gate P2 and the block R also includes a reference voltage E3 and a threshold comparator C3. It is controlled by the block D having inputs connected with the output terminals of threshold comparators C1, C2 of an output transistor T1. Peak value of the voltage Va is about 400V when the spark is not present and about 250V when the spark is present.

公开(公告)号：JPH07202606A

公开(公告)日：1995-08-04

申请号：JP19427394

申请日：1994-08-18

Applicant: CONS RIC MICROELETTRONICA

Inventor： NATAARE AIETSURO ,  SERUJIO PARAARA ,  SARUBUATOORE SUKIATSUCHIANOOSE

IPC: H03G11/00 ,  H03K17/0812 ,  H03K17/082 ,  H03K17/16

Abstract: PURPOSE: To stabilize an open ring device by reducing its gain and to smoothly reduce a load current independently of the magnitude of its increase by introducing a feedback circuit block. CONSTITUTION: A limiter circuit for a maximum current to be passed from a power transistor(TR) T'p to a load ZL connected to the TR T'p is provided with a feedback circuit block 2 in addition to a deviation amplifier 1', a driver stage P' and a detecting means Rs for a load current IL. The block 2 is connected between the control terminal of the TR T'p and a current generator in the amplifier 1'.