Apparatus, system, and method for a compliant pin electrical connection for an area array device

    公开(公告)号:GB2488197A

    公开(公告)日:2012-08-22

    申请号:GB201201076

    申请日:2010-11-09

    Applicant: IBM

    Abstract: An apparatus, system, and method are disclosed for providing electrical connections for an area array device. Each of a plurality of holes in a circuit board has a conductor within it and has an opening on a side of the circuit board. Electrically conductive contact posts extend from the openings of the holes. The contact posts are in a pattern corresponding to contact pads on an area array device. A compliant portion of each contact post is inserted within a hole. The conductor compresses the compliant portion to removably secure the contact post within the hole. The conductors form an electrical connection with the contact post. A spring portion of each contact post extends away from the circuit board. The spring portion is compressible toward the circuit board, and provides an electrical connection between a contact post and a contact pad in response to contact with the contact pad.

    2.
    发明专利
    未知

    公开(公告)号:DE69026188D1

    公开(公告)日:1996-05-02

    申请号:DE69026188

    申请日:1990-10-26

    Applicant: IBM

    Abstract: This invention provides an interposer for electrically connecting two substrates with high density interconnections The interposer comprises an elastomeric material surrounding fine metal wires which extend through the elastomeric material. The elastomeric material provides mechanical support and electrical isolation for the wires which connect the two opposing surfaces of the interposer with mating substrates. One surface of the interposer has grooves cut into it which mechanically isolate the individual wires. This mechanical isolation between wires reduces the stress placed on the substrates from being connected when the interposer is compressed between the substrates. The support given individual wires by the elastomeric material is controlled, by adjusting the spacing depth and widths of the grooves, to provide uniform compression across the substrates. Reducing the differentials in compression across the substrates reduces the stress on the substrates and their connections, and therefore, maintains substrate reliability when the substrates are exposed to extended time periods under compression.

    Leiterplatten-Randstecker
    3.
    发明专利

    公开(公告)号:DE112011100335B4

    公开(公告)日:2020-06-04

    申请号:DE112011100335

    申请日:2011-03-01

    Applicant: IBM

    Abstract: Leiterplatte (900), die zumindest eine elektrische Leiterbahn aufweist, wobei die Leiterplatte (900) Folgendes umfasst:eine obere Fläche,eine untere Fläche,zumindest einen Randabschnitt, der zumindest eine abgerundete Oberfläche aufweist, die sich von der oberen Fläche bis zu der unteren Fläche erstreckt,eine erste Schicht auf der Oberseite der oberen Fläche, die sich über die abgerundete Oberfläche des Randabschnitts erstreckt und eine abgerundete Oberfläche der ersten Schicht ausbildet, wobei sich die erste Schicht bis zu der unteren Fläche erstreckt,zumindest eine Kontaktfläche (912, 914, 916, 918), die sich an der Position der ersten Schicht über der oberen Fläche der Leiterplatte (900) befindet und sich über die abgerundete Oberfläche der ersten Schicht bis zu einem Punkt unterhalb der oberen Fläche der Leiterplatte (900) erstreckt, wobei die Kontaktfläche (912, 914, 916, 918) elektrisch mit einer Leiterbahn der Leiterplatte (900) verbunden ist, undeine zweite Schicht auf der Oberseite der ersten Schicht, die sich über die abgerundete Oberfläche der ersten Schicht bis zu der unteren Fläche erstreckt und zumindest eine Öffnung (924) beinhaltet, die die zumindest eine Kontaktfläche (912, 914, 916, 918) freilegt.

    Apparatus, system, and method for a compliant pin electrical connection for an area array device

    公开(公告)号:GB2488197B

    公开(公告)日:2014-08-27

    申请号:GB201201076

    申请日:2010-11-09

    Applicant: IBM

    Abstract: An apparatus, system, and method are disclosed for providing electrical connections for an area array device. Each of a plurality of holes in a circuit board has a conductor within it and has an opening on a side of the circuit board. Electrically conductive contact posts extend from the openings of the holes. The contact posts are in a pattern corresponding to contact pads on an area array device. A compliant portion of each contact post is inserted within a hole. The conductor compresses the compliant portion to removably secure the contact post within the hole. The conductors form an electrical connection with the contact post. A spring portion of each contact post extends away from the circuit board. The spring portion is compressible toward the circuit board, and provides an electrical connection between a contact post and a contact pad in response to contact with the contact pad.

    5.
    发明专利
    未知

    公开(公告)号:DE69737599T2

    公开(公告)日:2007-12-20

    申请号:DE69737599

    申请日:1997-09-12

    Applicant: IBM

    Abstract: The present invention is directed to a structure comprising a substrate having a surface; a plurality of elongated electrical conductors extending away from the surface; each of said elongated electrical conductors having a first end affixed to the surface and a second end projecting away from the surface; there being a plurality of second ends; and a means for maintaining the plurality of the second ends in substantially fixed positions with respect to each other. The structure is useful as a probe for testing and burning in integrated circuit chips at the wafer level.

    6.
    发明专利
    未知

    公开(公告)号:DE69737599D1

    公开(公告)日:2007-05-24

    申请号:DE69737599

    申请日:1997-09-12

    Applicant: IBM

    Abstract: The present invention is directed to a structure comprising a substrate having a surface; a plurality of elongated electrical conductors extending away from the surface; each of said elongated electrical conductors having a first end affixed to the surface and a second end projecting away from the surface; there being a plurality of second ends; and a means for maintaining the plurality of the second ends in substantially fixed positions with respect to each other. The structure is useful as a probe for testing and burning in integrated circuit chips at the wafer level.

    7.
    发明专利
    未知

    公开(公告)号:DE69026188T2

    公开(公告)日:1996-10-10

    申请号:DE69026188

    申请日:1990-10-26

    Applicant: IBM

    Abstract: This invention provides an interposer for electrically connecting two substrates with high density interconnections The interposer comprises an elastomeric material surrounding fine metal wires which extend through the elastomeric material. The elastomeric material provides mechanical support and electrical isolation for the wires which connect the two opposing surfaces of the interposer with mating substrates. One surface of the interposer has grooves cut into it which mechanically isolate the individual wires. This mechanical isolation between wires reduces the stress placed on the substrates from being connected when the interposer is compressed between the substrates. The support given individual wires by the elastomeric material is controlled, by adjusting the spacing depth and widths of the grooves, to provide uniform compression across the substrates. Reducing the differentials in compression across the substrates reduces the stress on the substrates and their connections, and therefore, maintains substrate reliability when the substrates are exposed to extended time periods under compression.

    10.
    发明专利
    未知

    公开(公告)号:DE69200544T2

    公开(公告)日:1995-05-04

    申请号:DE69200544

    申请日:1992-01-17

    Applicant: IBM

    Abstract: An integral elastomeric card edge connector provides shorter signal paths through the contact with reduced interference. The card edge contact allows high density interconnection between several layers of multi-layer circuit card without routing signal paths to the card surface. Elastomeric contact tab supports provide positive contact pressure and the necessary wipe action to ensure electrical contact. The process for forming the integral contacts begins with a standard multi-layer card which is then beveled, etched to expose the contact tabs, filled with elastomeric material and processed to expose the tabs supported by elastomeric columns. The connector may be used in card-on-board technologies or for the connection of multi-chip organic substrates to boards or to other substrates.

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