公开(公告)号：DE2719278A1

公开(公告)日：1977-11-17

申请号：DE2719278

申请日：1977-04-29

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  BOURKE DONALL GARRAID ,  VERGARI LOUIS PETER

IPC: G06F13/12 ,  G06F9/46 ,  G06F13/34 ,  G06F3/04 ,  G06F9/00

Abstract: Improvements introduced in a peripheral device control unit with improved counting logic, for use in a data processing system including a central processing unit, a memory unit, a logic input-output control unit and a line general coupling (i/f). (Machine-translation by Google Translate, not legally binding)

公开(公告)号：DE2430693A1

公开(公告)日：1975-01-16

申请号：DE2430693

申请日：1974-06-26

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  DAVIS MCHAEL IAN ,  BOCA RATON FLA ,  MITCHELL JUN MATTHEW JOSEPH

IPC: G06F13/12 ,  G06F15/16 ,  G06F3/04

公开(公告)号：DE2719253A1

公开(公告)日：1977-11-10

申请号：DE2719253

申请日：1977-04-29

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  DAVIS MICHAEL IAN ,  VERGARI LOUIS PETER

IPC: G06F3/00 ,  G06F13/26 ,  G06F13/34 ,  G06F3/04 ,  G06F9/00

Abstract: A peripheral device control unit with improved input-output coupling logic circuits for use in a data processing system including a central computer unit, a memory unit, input-output control logic circuits and a line general coupling having a plurality of lines for interconnecting the units in parallel. (Machine-translation by Google Translate, not legally binding)

公开(公告)号：CH629010A5

公开(公告)日：1982-03-31

申请号：CH1597177

申请日：1977-12-23

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  VERGARI LOUIS PETER

IPC: G06F13/36 ,  G06F13/40 ,  G06F3/00

公开(公告)号：CH620778A5

公开(公告)日：1980-12-15

申请号：CH518677

申请日：1977-04-26

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  BOURKE DONALL GARRAID ,  VERGARI LOUIS PETER

IPC: G06F13/12 ,  G06F9/46 ,  G06F13/34 ,  G06F3/04

Abstract: Improvements introduced in a peripheral device control unit with improved counting logic, for use in a data processing system including a central processing unit, a memory unit, a logic input-output control unit and a line general coupling (i/f). (Machine-translation by Google Translate, not legally binding)

公开(公告)号：AU2474477A

公开(公告)日：1978-11-09

申请号：AU2474477

申请日：1977-04-02

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  BOURKE DONALL GARRAID ,  VERGARI LOUIS PETER

IPC: G06F13/12 ,  G06F9/46 ,  G06F13/34 ,  G06F3/00 ,  G06F9/18

Abstract: Improvements introduced in a peripheral device control unit with improved counting logic, for use in a data processing system including a central processing unit, a memory unit, a logic input-output control unit and a line general coupling (i/f). (Machine-translation by Google Translate, not legally binding)

公开(公告)号：AU2474277A

公开(公告)日：1978-11-09

申请号：AU2474277

申请日：1977-05-02

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  VERGARI LOUIS PETER ,  DAVIS MICHAEL IAN

IPC: G06F3/00 ,  G06F13/26 ,  G06F13/34

Abstract: A peripheral device control unit with improved input-output coupling logic circuits for use in a data processing system including a central computer unit, a memory unit, input-output control logic circuits and a line general coupling having a plurality of lines for interconnecting the units in parallel. (Machine-translation by Google Translate, not legally binding)

公开(公告)号：DE2758023A1

公开(公告)日：1978-07-13

申请号：DE2758023

申请日：1977-12-24

Applicant: IBM

Inventor： BOUKNECHT MAX ABBOTT ,  VERGARI LOUIS PETER

IPC: G06F13/36 ,  G06F13/40 ,  G06F3/04

Abstract: In a data processing system which includes a base central processing unit, channel, and input/output (I/O) interface to which peripheral devices may be attached, a special attachment is disclosed. The attachment made to the base I/O interface includes connector circuitry which is required when the signals on the input/output interface must be repowered to peripheral devices in an expansion input/output unit, power isolation must be provided between a base data processing system and I/O expansion unit, or a remote peripheral device is to be attached to the base data processing system I/O interface. The connector circuit includes logic which responds to the normal I/O interface signals to energize drivers in the connector circuit to achieve repowering of signals on bidirectional signal lines and unidirectional signal lines.