公开(公告)号：CA1017871A

公开(公告)日：1977-09-20

申请号：CA206893

申请日：1974-08-13

Applicant: IBM

Inventor： CARTER RICHARD S ,  HOGAN SPURGEON G JR ,  LEUNG WAN L ,  MCGILVRAY BRUCE L ,  WERNER ROBERT H

IPC: G06F9/38

Abstract: Apparatus for fetching instructions to an instruction register of a central processing unit, including instruction buffers for storing instructions prior to their execution in the CPU (look-ahead) and apparatus for storing instructions which have been executed in the CPU (look-behind) in anticipation of their further use in, for example, programming loops. The look-behind apparatus comprises a multi-word buffer with its associated data register. The buffer data register, in addition to its function as part of the look-behind apparatus, also provides an additional level of look-ahead.

公开(公告)号：CA989521A

公开(公告)日：1976-05-18

申请号：CA174806

申请日：1973-06-22

Applicant: IBM

Inventor： BURK JOHN L ,  HOGAN SPURGEON G JR ,  LARSON RUSSELL H ,  MCGILVRAY BRUCE L

IPC: G06F12/08 ,  G06F12/10

Abstract: This specification describes a virtual memory system comprising a main storage and a smaller high speed buffer. Both main storage and the buffer are real-address oriented. Current virtual-to-real address translations are retained in a Translation Look Aside Table (TLAT) and real addresses of data stored in the buffer are maintained in a buffer directory. The CPU-provided virtual address causes access to the TLAT and to the buffer directory. The virtual address stored in the word accessed from the TLAT is compared to the virtual address from the CPU and the real addresses accessed from the TLAT and the buffer directory are compared to each other. If both comparisons are equal, the data is accessed from the buffer.