LASER FUSE STRUCTURES FOR HIGH POWER APPLICATIONS
    1.
    发明申请
    LASER FUSE STRUCTURES FOR HIGH POWER APPLICATIONS 审中-公开
    高功率应用的激光保险丝结构

    公开(公告)号:WO2007063044A3

    公开(公告)日:2007-11-08

    申请号:PCT/EP2006068939

    申请日:2006-11-27

    CPC classification number: H01L23/5258 H01L2924/0002 H01L2924/00

    Abstract: The present invention relates to a laser fuse structure for high power applications. Specifically, the laser fuse structure of the present invention comprises first and second conductive supporting elements (12a, 12b) , at least one conductive fusible link (14) , first and second connection elements (20a, 20b) , and first and second metal lines (22a, 22b) . The conductive supporting elements (12a, 12b) , the conductive fusible link (14) , and the metal lines (22a, 22b) are located at a first metal level (3) , while the connect elements (20a, 20b) are located at a second, different metal level (4) and are connected to the conductive supporting elements (12a, 12b) and the metal lines (22a, 22b) by conductive via stacks (18a, 18b, 23a, 23b) that extend between the first and second metal levels (3, 4).

    Abstract translation: 本发明涉及一种用于大功率应用的激光熔丝结构。 具体地,本发明的激光熔丝结构包括第一和第二导电支撑元件(12a,12b),至少一个导电熔丝(14),第一和第二连接元件(20a,20b)以及第一和第二金属线 (22a,22b)。 导电支撑元件(12a,12b),导电熔丝(14)和金属线(22a,22b)位于第一金属层(3)处,而连接元件(20a,20b)位于 第二不同的金属级(4),并且通过导电通孔叠层(18a,18b,23a,23b)与导电支撑元件(12a,12b)和金属线(22a,22b)连接, 第二金属含量(3,4)。

    5.
    发明专利
    未知

    公开(公告)号:AT490552T

    公开(公告)日:2010-12-15

    申请号:AT07822110

    申请日:2007-10-31

    Applicant: IBM

    Abstract: Methods of forming wire and solder bonds are disclosed. In one embodiment, a method includes providing a structure including a wire bond metal region for the wire bond and a solder bond metal region for the solder bond, both regions covered by a silicon nitride layer over a silicon oxide layer; forming in a material a first opening to the silicon oxide layer over the wire bond metal region and a second opening exposing the solder bond metal region; forming the solder bond to the solder bond metal region while the wire bond metal region is covered; exposing the wire bond metal region including removing the silicon oxide layer to the wire bond metal region; and forming the wire bond to the wire bond metal region. Wire bonds and solder bonds can be made accessible on a single multi-part wafer (MPW) or on a single chip, if necessary, and can be formed substantially simultaneously.

    8.
    发明专利
    未知

    公开(公告)号:AT497419T

    公开(公告)日:2011-02-15

    申请号:AT07822113

    申请日:2007-10-31

    Applicant: IBM

    Abstract: Methods of forming wire and solder bond structures are disclosed. In one embodiment, a method includes providing a structure including a wire bond metal region for the wire bond and a solder bond metal region for the solder bond; forming a protective layer over the wire bond metal region only; forming a silicon nitride layer over a silicon oxide layer over the wire bond metal region and the solder bond metal region; forming the solder bond to the solder bond metal region while maintaining the wire bond metal region covered; exposing the wire bond metal region including removing the protective layer; and forming the wire bond to the wire bond metal region. Wire bond and solder bond structures can be made accessible on a single multi-part wafer (MPW) wafer or on a single chip, if necessary.

Patent Agency Ranking