公开(公告)号：GB2497201B

公开(公告)日：2014-02-05

申请号：GB201221413

申请日：2012-11-28

Applicant: IBM

Inventor： PEI CHENGWEN ,  WANG GENG ,  RAUSCH WERNER ,  NUMMY KAREN

IPC: H01L27/108

公开(公告)号：GB2497201A

公开(公告)日：2013-06-05

申请号：GB201221413

申请日：2012-11-28

Applicant: IBM

Inventor： PEI CHENGWEN ,  WANG GENG ,  RAUSCH WERNER ,  NUMMY KAREN

IPC: H01L27/108

Abstract: A trench is formed in a semiconductor substrate 8, extending through a single crystal of semiconductor material 20, and is filled with a node dielectric layer 50 and at least a doped polycrystalline semiconductor fill portion 60A, 60B. A gate stack 32, 34, 38 for an access transistor is formed on the semiconductor substrate, and a gate spacer 36 is formed around the gate stack. A source/drain trench is formed between an outer sidewall of the gate spacer and a sidewall of the doped polycrystalline semiconductor fill portion, the side wall of the trench may vertically coincide with the gate spacer and may contact the gate spacer. An epitaxial source region 53 and a polycrystalline semiconductor material portion 57 overlying fill material portion are simultaneously formed by a selective epitaxy process such that the epitaxial source region and the polycrystalline semiconductor material portion contact each other. The polycrystalline semiconductor material portion provides a robust low resistance conductive path between the source region and the inner electrode. The epitaxial semiconductor material and the single crystal semiconductor material may have different lattice constants and may be n-doped, carbon doped silicon while the single crystal contains no carbon. The fill semiconductor material may be n-doped polysilicon or n-doped polycrystalline germanium. A shallow trench isolation (STI) structure may overlie the semiconductor fill material and may laterally contact one of its sidewalls. The STI structure may comprise a gate stack.