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公开(公告)号:DE69433769D1
公开(公告)日:2004-06-17
申请号:DE69433769
申请日:1994-03-04
Applicant: IBM
IPC: H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52 , H05K1/00 , H05K1/03 , H05K3/40 , H05K3/46
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公开(公告)号:MY114888A
公开(公告)日:2003-02-28
申请号:MYPI9501897
申请日:1995-07-06
Applicant: IBM
Inventor: COCKERILL MARTHA ASHLEY CLARK , MALTABES JOHN GEORGE , O'CONNOR LORETTA JEAN , VOLDMAN STEVEN HOWARD
IPC: H01L25/00 , H01L27/00 , H01L21/66 , H01L21/98 , H01L25/065
Abstract: A FABRICATION METHOD FOR MANUFACTURING A MONOLITHIC ELECTRONIC MODULE(31) COMPRISING A PLURALITY OF STACKED PLANAR EXTENDING ARRAYS (23) OF INTEGRATED CIRCUIT CHIPS (13,17). THE FABRICATION METHOD INCLUDES DICING A WAFER OF INTEGRATED CIRCUIT CHIPS INTO A PLURALITY OF ARRAYS OF INTEGRATED CIRCUIT CHIPS. THE ARRAYS OF INTEGRATED CIRCUIT CHIPS ARE THEN STACKED TO FORM AN ELECTRONIC MODULE. A METALLIZATION PATTERN (33) MAY BE DEPOSITED ON A SUBSTANTIALLY PLANAR SURFACE OF THE ELECTRONIC MODULE, AND USED TO INTERCONNECT THE VARIOUS ARRAYS OF INTEGRATED CIRCUIT CHIPS CONTAINED THEREIN. SPECIFIC DETAILS OF THE FABRICATION METHOD AND RESULTANT MULTI-CHIP PACKAGE ARE SET FORTH.
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