公开(公告)号：JP2005328059A

公开(公告)日：2005-11-24

申请号：JP2005139334

申请日：2005-05-12

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BOJARCZUK NESTOR A JR ,  CARTIER EDUARD A ,  FRANK MARTIN M ,  GOUSEV EVGENI ,  SUPURATEIKU GUUHA ,  NARAYANAN VIJAY

IPC: H01L21/8234 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51 ,  H01L29/76 ,  H01L29/78 ,  H01L29/786 ,  H01L51/00 ,  H01L51/05

CPC classification number: H01L21/28202 ,  H01L21/28194 ,  H01L21/823857 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: PROBLEM TO BE SOLVED: To provide a complementary metal-oxide semiconductor (CMOS) structure including an intermediate layer between a Si-containing gate electrode and a high-k gate dielectric, so that a threshold voltage and a flat-band voltage of the structure are stabilized.
SOLUTION: An insulating intermediate layer for use in the complementary metal-oxide semiconductor (CMOS) is provided in order to prevent undesirable shifts of the threshold voltage and the flat-band voltage. The insulating intermediate layer is disposed between a gate dielectric having a dielectric constant of more than 4.0 and a Si-containing gate conductor. The insulating intermediate layer comprises metal nitride capable of containing oxygen, and stabilizes the threshold voltage and the flat-band voltage. For a preferred embodiment, the insulating intermediate layer comprises aluminum nitride or aluminum oxinitride, and the gate dielectric comprises a hafnium oxide, hafnium silicate, or hafnium oxinitride. The structure is especially useful for stabilizing the threshold voltage and the flat-band voltage of a p-type field effect transistor.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供在含Si栅极电极和高k栅极电介质之间包括中间层的互补金属氧化物半导体（CMOS）结构，使得阈值电压和平带电压 的结构是稳定的。 解决方案：提供用于互补金属氧化物半导体（CMOS）的绝缘中间层，以便防止阈值电压和平带电压的不希望的偏移。 绝缘中间层设置在介电常数大于4.0的栅极电介质和含Si的栅极导体之间​​。 绝缘中间层包括能够含有氧的金属氮化物，稳定阈值电压和平带电压。 对于优选实施例，绝缘中间层包括氮化铝或氮氧化铝，栅极电介质包括氧化铪，硅酸铪或氧化铪。 该结构对于稳定p型场效应晶体管的阈值电压和平带电压特别有用。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2000252224A

公开(公告)日：2000-09-14

申请号：JP2000047152

申请日：2000-02-24

Applicant: IBM

Inventor： NESTOR A BOJAATSUAKU ,  SUPURATEIKU GUUHA ,  GUPTA ARUNAVA

IPC: H01L21/205 ,  H01L21/02 ,  H01L21/20 ,  H01L21/762 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing substantially a single crystal or polycrystal semiconductor structure on a host substrate at a low cost. SOLUTION: First, a layer made of nitride material with a wide band gap such as gallium nitride, aluminum nitride, indium nitride, etc., is adhered to a sapphire substrate 11. Next, a silicon structure 16 is grown on the nitride layer. A host substrate 18 is bonded to the exposed surface area of the semiconductor structure by a bonding agent. Then the sapphire substrate is lifted off through a metallization procedure for releasing a nitrogen from gallium, aluminum or indium.