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    EXHAUSTION RECOVERY SUPPORT IN DATA PROCESSING SYSTEM USING MEMORY MIRRORING
    1.
    发明专利
    EXHAUSTION RECOVERY SUPPORT IN DATA PROCESSING SYSTEM USING MEMORY MIRRORING 审中-公开

    公开(公告)号：JP2002182972A

    公开(公告)日：2002-06-28

    申请号：JP2001319726

    申请日：2001-10-17

    Applicant: IBM

    Inventor： BAUMAN CHARLES DAVID ,  RICHARD BEARUKOFUSUKI ,  CLEMENT THOMAS J ,  PEARCE JERRY WILLIAM ,  TURNER MICHAEL R

    IPC: G06F12/16 ,  G06F11/20 ,  G06F12/00 ,  G06F12/02

    Abstract: PROBLEM TO BE SOLVED: To provide a method for reducing a risk of a system failure which is caused by memory exhaustion in a system where memory compression is used. SOLUTION: A memory exhaustion state is processed in a data processing system provided with first and second regions of a physical memory and is detected while the second region is mirroring at least part of the first region. Memory mirroring is at least partially deactivated, and at least part of the second region is used for augmenting the first region to eliminate the memory exhaustion state. In an illustrative embodiment, the memory exhaustion state occurs when the data processing system compressed real memory into the first region of the physical memory and the first area is not provided with a sufficient available capacity in order to accommodate a present request for real memory. The memory exhaustion state is eliminated by compressing at least part of the real memory in the second region.

    SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE
    3.
    发明专利
    SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE 未知

    公开(公告)号：CA1251869A

    公开(公告)日：1989-03-28

    申请号：CA506754

    申请日：1986-04-15

    Applicant: IBM

    Inventor： BRADLEY DAVID J ,  KONOPIK BRADLY J ,  REED MARTIN A ,  TANNENBAUM ALAN R ,  TURNER MICHAEL R

    IPC: G06F9/46 ,  G06F9/48 ,  G06F13/24

    Abstract: SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE A system is disclosed for managing a plurality of interrupt handlers in a linked-list data structure, for servicing a plurality of input/output devices sharing a common interrupt line in a microcomputer. The system provides for an orderly method to link a newly loaded interrupt handler routine into a linked-list data structure consisting of previously loaded interrupt handler routines. The system further provides for an orderly method to share a common interrupt line among a plurality of input/output devices being serviced by the interrupt handlers. The system further provides for an orderly means to unlink a particular interrupt handler routine from the linked-list data structure when a corresponding input/output device is to be deactivated. The system finds special utility in a multitasking operating system environment where input/output devices can be deactivated in a different sequence from that in which they were originally activated.

    MULTIPLE INPUT/OUTPUT DEVICES HAVING SHARED ADDRESS SPACE
    7.
    发明专利
    MULTIPLE INPUT/OUTPUT DEVICES HAVING SHARED ADDRESS SPACE 未知

    公开(公告)号：CA2051199A1

    公开(公告)日：1992-05-01

    申请号：CA2051199

    申请日：1991-09-11

    Applicant: IBM

    Inventor： D AMBROSE JOHN J ,  SHETTERLY WILLIAM K ,  THOMPSON STEPHEN ,  TURNER MICHAEL R

    IPC: G06F13/14 ,  G06F13/10

    Abstract: A hardware-based system for managing multiple input/output devices sharing the same set of addresses in a computer system is described. The new VIRTUAL ENABLED state is a hybrid of the current ENABLED or ACTIVE and DISABLED or INACTIVE states. In the ENABLED state, an I/O adapter responds to I/O addressing and presents interrupts to the processor. In the DISABLED state, the I/O adapter does not respond to I/O addressing and does not present interrupts. In the new VIRTUAL ENABLED state, the adapter does not respond to I/O addressing (as in the DISABLED state), but will still produce an interrupt (as in the ENABLED state). With the VIRTUAL state, multiple I/O adapters that would normally contend for the same set of addresses (ENABLED state), or optionally be rendered inoperable (DISABLED state), can always remain available for I/O. A single register where the processor can read the interrupt status for all ENABLED and/or VIRTUAL ENABLED adapters sharing the same set of addresses is provided. Other unique registers are also provided to allow the processor to cycle any of the ENABLED and VIRTUAL ENABLED devices between these two states to permit servicing of the interrupt.

    Brückenfunktion zwischen Virtual Machine Monitor und Bare-Metal-Bootvorgang
    8.
    发明专利
    Brückenfunktion zwischen Virtual Machine Monitor und Bare-Metal-Bootvorgang 未知

    公开(公告)号：DE112012005209T5

    公开(公告)日：2014-09-18

    申请号：DE112012005209

    申请日：2012-11-22

    Applicant: IBM

    Inventor： BEALKOWSKI RICHARD ,  TURNER MICHAEL R

    IPC: G06F9/00

    Abstract: Es werden Mechanismen zum Ausführen eines Bare-Metal-Bootvorgangs für das Bare-Metal-Booten eines Steuerprogramms bereitgestellt. Diese Mechanismen booten eine Datenverarbeitungseinheit in eine Hypervisor-Eigentümerschaftsphase des Bare-Metal-Bootvorgangs. Während der Hypervisor-Eigentümerschaftsphase des Bare-Metal-Bootvorgangs wird ein Hypervisor geladen und steuert und verwaltet Plattformhardware der Datenverarbeitungseinheit. Die Datenverarbeitungseinheit wird anschließend aus der Hypervisor-Eigentümerschaftsphase des Bare-Metal-Bootvorgangs in eine Überleitungsphase des Bare-Metal-Bootvorgangs gebootet, in der der Hypervisor die Steuerung und Verwaltung der Plattformhardware der Datenverarbeitungseinheit für das Steuerprogramm freigibt. Die Datenverarbeitungseinheit wird dann aus der Überleitungsphase in eine Steuerprogramm-Eigentümerschaftsphase des Bare-Metal-Bootvorgangs gebootet, in der das Steuerprogramm die vollständige Steuerung hat und die Plattformhardware verwaltet. Der Bare-Metal-Bootvorgang wird durchgeführt, ohne die Datenverarbeitungseinheit neu zu starten und ohne die Initialisierung von Firmware zu durchlaufen.

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