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    SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE
    4.
    发明专利
    SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE 未知

    公开(公告)号：CA1251869A

    公开(公告)日：1989-03-28

    申请号：CA506754

    申请日：1986-04-15

    Applicant: IBM

    Inventor： BRADLEY DAVID J ,  KONOPIK BRADLY J ,  REED MARTIN A ,  TANNENBAUM ALAN R ,  TURNER MICHAEL R

    IPC: G06F9/46 ,  G06F9/48 ,  G06F13/24

    Abstract: SYSTEM FOR MANAGING A PLURALITY OF SHARED INTERRUPT HANDLERS IN A LINKED-LIST DATA STRUCTURE A system is disclosed for managing a plurality of interrupt handlers in a linked-list data structure, for servicing a plurality of input/output devices sharing a common interrupt line in a microcomputer. The system provides for an orderly method to link a newly loaded interrupt handler routine into a linked-list data structure consisting of previously loaded interrupt handler routines. The system further provides for an orderly method to share a common interrupt line among a plurality of input/output devices being serviced by the interrupt handlers. The system further provides for an orderly means to unlink a particular interrupt handler routine from the linked-list data structure when a corresponding input/output device is to be deactivated. The system finds special utility in a multitasking operating system environment where input/output devices can be deactivated in a different sequence from that in which they were originally activated.

    INTERRUPT LEVEL SHARING
    5.
    发明专利
    INTERRUPT LEVEL SHARING 未知

    公开(公告)号：AU4255085A

    公开(公告)日：1986-01-16

    申请号：AU4255085

    申请日：1985-05-16

    Applicant: IBM

    Inventor： BRADLEY DAVID J ,  OTT WILLIAM B

    IPC: G05B19/05 ,  G06F9/48 ,  G06F13/24 ,  G06F9/46

    Abstract: An interrupt interface circuit for interrupt level sharing comprising a pulse generator (36, 38) having an open-collector or tri-state output (40) connected to an external interrupt line shared by other similar circuits. An active internal interrupt signal (Card Unit) causes the pulse generator to pulse. The external interrupt line is fed back and latched on a disabling input of the pulse generator so that any pulse on the external interrrupt line prevents further pulsing. The software handler of the interrupt, upon servicing an interrupt of the interrupt level, causes the enabling of the pulse generator of that level, thereby permitting active internal interrupt signals to produce a further pulse. By this interrupt level sharing, phantom interrupts are eliminated and servicing overhead is minimized.

    APPARATUS AND METHOD FOR READING AND WRITING TEXT CHARACTERS IN A GRAPHICS DISPLAY
    6.
    发明专利
    APPARATUS AND METHOD FOR READING AND WRITING TEXT CHARACTERS IN A GRAPHICS DISPLAY 未知

    公开(公告)号：CA1175963A

    公开(公告)日：1984-10-09

    申请号：CA406361

    申请日：1982-06-30

    Applicant: IBM

    Inventor： BRADLEY DAVID J

    IPC: G09G5/24 ,  G09G1/16 ,  G09G1/28 ,  G09G5/02 ,  G09G5/393 ,  G09G5/40 ,  G09G1/02

    Abstract: BC9-81-005 : Apparatus and Method for Reading and Writing Text Characters in a Graphics Display Apparatus and method for writing text characters to a raster scan video display operated in an all-points-addressable, or graphics, mode, and fox reading characters thus written. A graphic video display buffer directly refreshes the display with graphics data received from a microprogrammed processor. The processor writes a character to the display by selecting and loading into the graphics video display buffer a text character dot pattern retrieved from main storage, and reads a character previously written by comparing a dot pattern retrieved from the display buffer with dot patterns retrieved from main storage. To write a character to the display in color, the graphic dot image of a selected character retrieved from main storage is expanded to a selected pixel and color format, and stored in the graphics video display buffer. Text characters thus written in color are read by retrieving from the display buffer the expanded dot image, restoring the expanded dot image to its original form, and comparing the restored dot image with graphic dot images retrieved from storage.

    INTERRUPT LEVEL SHARING
    10.
    发明专利
    INTERRUPT LEVEL SHARING 未知

    公开(公告)号：AU571693B2

    公开(公告)日：1988-04-21

    申请号：AU4255085

    申请日：1985-05-16

    Applicant: IBM

    Inventor： BRADLEY DAVID J ,  OTT WILLIAM B

    IPC: G05B19/05 ,  G06F9/48 ,  G06F13/24 ,  G06F9/46

    Abstract: An interrupt interface circuit for interrupt level sharing comprising a pulse generator (36, 38) having an open-collector or tri-state output (40) connected to an external interrupt line shared by other similar circuits. An active internal interrupt signal (Card Unit) causes the pulse generator to pulse. The external interrupt line is fed back and latched on a disabling input of the pulse generator so that any pulse on the external interrrupt line prevents further pulsing. The software handler of the interrupt, upon servicing an interrupt of the interrupt level, causes the enabling of the pulse generator of that level, thereby permitting active internal interrupt signals to produce a further pulse. By this interrupt level sharing, phantom interrupts are eliminated and servicing overhead is minimized.

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