Memory-centered computer system
    1.
    发明授权
    Memory-centered computer system 失效
    记忆中心计算机系统

    公开(公告)号:US3599186A

    公开(公告)日:1971-08-10

    申请号:US3599186D

    申请日:1970-05-14

    Applicant: IBM

    CPC classification number: G06F9/35

    Abstract: The invention concerns a computer system with the usual input and output devices, arithmetic facilities, clocking facilities, associated control logic and incorporating memory facilities, such as a core memory, arranged in a centralized manner with respect to the other facilities of the system, and having uniquely arranged instruction and data accessing control circuitry for establishing a more efficient utilization of hardware. Basically, the core memory is arranged in a conventional manner as far as reading, writing, and transferring of data is concerned, but beyond this, has particular addressable areas designated Special Addresses for facilitating the processing of both instructions and data with a minimum amount of external hardware. The system operates with only a single address register for accessing both instruction and operand information. In a usual case, an operand is accessed and placed in the special address section of memory by using the addressing facilities. Thereafter, another operand is accessed and the operation required is performed with one operand in the special address section accessed by implied addressing, rather than accessing by the conventional addressing facilities. The foregoing arrangement requires a somewhat longer processing interval, but permits the satisfactory accomplishment of all processing required by the use of a unitary essentially single addressing facility. The system is considered to be memory-centered since the memory is involved in practically all of the operations performed in the system. Thus, for example, the memory is used in storage of data and instructions, contains index registers and input/output data address, input/output length counts, editing formats, command key conditions, and various special words required during processing of information. The system operates according to predetermined clocking intervals during which the accessing of instructions, data, input/output transfers, etc. are performed, and in connection with the memory-centered aspect of the system, the clocking circuits are arranged for permutation in order that only a single operand or a pair of operands may be accessed, as circumstances may require. The system incorporates various counting means associated with the aforementioned primary addressing facilities to control the reading and writing of information both directly, sequentially, and sequentially within a selected block of information. The latter is particularly advantageous in operations requiring a repetitive accessing of selected areas of memory, such as during certain arithmetic operations, recomplementing, Multiply operations, and so on.

    INK JET PRINTING APPARATUS WITH LINE SWEEP AND INCREMENTAL PRINTING FACILITIES

    公开(公告)号:CA986170A

    公开(公告)日:1976-03-23

    申请号:CA178371

    申请日:1973-08-08

    Applicant: IBM

    Abstract: An ink jet printing apparatus is described having facilities for printing information in character locations, (boxes) each character location comprising a plurality of vertical columns of drop locations, and a number of characters comprising a line of information. Structures and circuits are included for insuring correct location of information within the character boxes and also providing for one mode in which characters are printed continuously line-by-line and another mode in which characters are printed incrementally character-by-character. During incremental printing, as well as the first character in a line or group of characters, provision is made for re-bounding the printhead back into the box of the character just printed, that is, prior to the next character box to be printed to insure that when the printhead starts up again for the next character that all drop components for that character, including any located in the immediate vicinity of the character boundary, are properly placed during printing.

    INCREASING THROUGHPUT IN INK JET PRINTING BY DROP SKIPPING AND REDUCING INK JET MERGING AND SPLATTER USING A STAIRSTEP GENERATOR

    公开(公告)号:CA978583A

    公开(公告)日:1975-11-25

    申请号:CA178367

    申请日:1973-08-08

    Applicant: IBM

    Abstract: 1385137 Printers INTERNATIONAL BUSINESS MACHINES CORP 4 Sept 1973 [13 Oct 1972] 41513/73 Heading G4H In an ink drop printer, one or more of a predefined sequence of ink-drop-deflection signals can be skipped through to speed up printing. After a shift register has been loaded via another shift register with a bit sequence for a given column of a character dot matrix, from a character generator, the bit sequence is shifted out, each "1" bit gating a slow clock train to a counter and permitting a D/A converter fed by the counter to control charging of a respective ink drop which is then deflected by a constant field by an amount dependent on the charge and therefore count. Each "0" bit zeroes the D/A converter output (so that the ink drop is caught in a gutter rather than deflected on to the paper) and gates a fast clock train to the counter so that the count position not required for printing is skipped through fast. To reduce ink spatter &c.' two or more sweeps down each column are made, with adjacent drops being deposited in different sweeps. A staircase generator may replace the counter and D/A converter.

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