PATTERNING METHOD OF SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE

    公开(公告)号:JP2000208434A

    公开(公告)日:2000-07-28

    申请号:JP2000000881

    申请日:2000-01-06

    Abstract: PROBLEM TO BE SOLVED: To form a contact of minimum feature dimensions by forming a pattern with a first parallel line and a second parallel line vertical to it inside a mask layer on a dielectric layer and forming a rectangular hole which reaches a substrate layer inside a dielectric layer according to the pattern. SOLUTION: A dielectric layer 22, a mask layer 24, a mask layer 26 and a resist layer 28 are provided sequentially on a substrate layer 20. The mask layer 26 is etched according to a line 30 of a pattern of the resist layer 28 and a parallel line 27 is formed in the mask layer 26. Then, a resist layer 32 is provided. A pattern of the resist layer 32 comprises a parallel line 34 and the line 34 is vertical to the line 27. A lattice pattern with a rectangular hole 36 is formed by anisotropically etching the mask layer 24 by using the line 27 and the line 34. The dielectric layer 22 is etched until it reaches the substrate layer 20 according to the lattice pattern.

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