公开(公告)号：JP2000353660A

公开(公告)日：2000-12-19

申请号：JP2000132555

申请日：2000-05-01

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： SCHULZE STEFFEN ,  FRANZ ZACHA

IPC: G03F1/08 ,  G03F7/20 ,  G03F7/22 ,  H01L21/027 ,  H01L23/544

Abstract: PROBLEM TO BE SOLVED: To satisfactorily deal with the problem of wafer edge by printing a first pattern in a wafer area where no edge effect is anticipated and printing an enlarged pattern in an area where more tendency of influence of the effect is anticipated. SOLUTION: A frame 31 of a reticle 30 is used for supporting a patterned mask which forms a main section 32 and two spare sections 34A and 34B. The main section 32 corresponds to a fully functional square area and prints a first pattern in an area which will not be influenced by any edge effect whatsoever. Also, it prints an enlarged pattern in non-functional edge area where likely influence of the effect is anticipated. In this way, the effect of nonuniformity can be improved and the problem of wafer edge can be dealt with satisfactorily.

公开(公告)号：JP2000208434A

公开(公告)日：2000-07-28

申请号：JP2000000881

申请日：2000-01-06

Applicant: INFINEON TECHNOLOGIES CORP ,  IBM

Inventor： RUPP THOMAS S ,  ALAN THOMAS ,  FRANZ ZACHA

IPC: H01L21/302 ,  G03F7/40 ,  H01L21/027 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/762 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To form a contact of minimum feature dimensions by forming a pattern with a first parallel line and a second parallel line vertical to it inside a mask layer on a dielectric layer and forming a rectangular hole which reaches a substrate layer inside a dielectric layer according to the pattern. SOLUTION: A dielectric layer 22, a mask layer 24, a mask layer 26 and a resist layer 28 are provided sequentially on a substrate layer 20. The mask layer 26 is etched according to a line 30 of a pattern of the resist layer 28 and a parallel line 27 is formed in the mask layer 26. Then, a resist layer 32 is provided. A pattern of the resist layer 32 comprises a parallel line 34 and the line 34 is vertical to the line 27. A lattice pattern with a rectangular hole 36 is formed by anisotropically etching the mask layer 24 by using the line 27 and the line 34. The dielectric layer 22 is etched until it reaches the substrate layer 20 according to the lattice pattern.