公开(公告)号：EP3022644A4

公开(公告)日：2017-03-22

申请号：EP13889647

申请日：2013-07-15

Applicant: INTEL CORP

Inventor： CALCIU IRINA ,  GOTTSCHLICH JUSTIN E ,  SHPEISMAN TATIANA

IPC: G06F9/44 ,  G06F3/06 ,  G06F9/46 ,  G06F12/0813

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/067 ,  G06F3/0673 ,  G06F9/44 ,  G06F9/466 ,  G06F9/467 ,  G06F12/0813

公开(公告)号：EP3123306A4

公开(公告)日：2017-11-22

申请号：EP15768457

申请日：2015-03-25

Applicant: INTEL CORP

Inventor： CALCIU IRINA ,  GOTTSCHLICH JUSTIN E ,  SHPEISMAN TATIANA ,  POKAM GILLES A

IPC: G06F9/38 ,  G06F9/46 ,  G06F9/52

CPC classification number: G06F9/467 ,  G06F9/528

Abstract: In an embodiment of a transactional memory system, an apparatus includes a processor and an execution logic to enable concurrent execution of at least one first software transaction of a first software transaction mode and a second software transaction of a second software transaction mode and at least one hardware transaction of a first hardware transaction mode and at least one second hardware transaction of a second hardware transaction mode. In one example, the execution logic may be implemented within the processor. Other embodiments are described and claimed.

公开(公告)号：EP3123321A4

公开(公告)日：2017-11-29

申请号：EP15769041

申请日：2015-03-23

Applicant: INTEL CORP

Inventor： GOTTSCHLICH JUSTIN E ,  POKAM GILLES A ,  HU SHILIANG ,  KASSA ROLF ,  WU YOUFENG ,  CALCIU IRINA

IPC: G06F9/455 ,  G06F11/36

CPC classification number: G06F9/467 ,  G06F11/34 ,  G06F11/362 ,  G06F11/3648

Abstract: A system is disclosed that includes a processor and a dynamic random access memory (DRAM). The processor includes a hybrid transactional memory (HyTM) that includes hardware transactional memory (HTM), and a program debugger to replay a program that includes an HTM instruction and that has been executed has been executed using the HyTM. The program debugger includes a software emulator that is to replay the HTM instruction by emulation of the HTM. Other embodiments are disclosed and claimed.