PHOTODETECTOR USING MOSFET WITH QUANTUM CHANNEL AND MANUFACTURING METHOD THEREOF

    公开(公告)号:AU2003258839A1

    公开(公告)日:2004-05-13

    申请号:AU2003258839

    申请日:2003-08-18

    Abstract: The present invention relates to a photodetector using MOSFET with quantum channels and a method for making thereof. A photodetector using MOSFET with quantum channels according to the present invention comprises a quantum channel formed on an activated SOI wafer, a gate oxide film covering said quantum channel; a gate formed so as to control carrier current at said quantum channel; a source and a drain formed at both ends of said channel area; and metal layers connected with said gate, said source and said drain. Thus, the photodetector according to the present invention can obtain more excellent photocurrent characteristics compared with the existing SOI MOSFET device by forming quantum channels on the SOI MOSFET. The MOSFET with quantum channels according to the present invention can be used as a good photodetector maintaining advantages of the existing MOSFET such as ease in integration and high speed.

    The growth method of gan on si by modulating the source flux
    2.
    发明授权
    The growth method of gan on si by modulating the source flux 有权
    通过调制源极通量来确定生长量的方法

    公开(公告)号:KR101121588B1

    公开(公告)日:2012-03-06

    申请号:KR20100134382

    申请日:2010-12-24

    Abstract: PURPOSE: A growth method of GaN on an SI by modulating a source flux are provided to grow a second GaN layer without a crack by inserting an AlGaN layer between an AlN buffer layer and a first GaN layer as a buffer layer. CONSTITUTION: A metal N compound of an N saturation is deposited in a substrate to form a first metal N compound layer. The metal N compound is deposited in the first metal N compound layer to form a second metal N compound layer. A GaN of N saturation is deposited on a second metal N compound layer to form a first GaN layer. A GaN of Ga saturation is deposited in the first GaN layer to form a second GaN layer.

    Abstract translation: 目的:提供通过调制源极通量的SI在SI上的生长方法,以通过在AlN缓冲层和第一GaN层之间插入AlGaN层作为缓冲层来生长具有裂纹的第二GaN层。 构成:将N饱和的金属N化合物沉积在衬底中以形成第一金属N化合物层。 金属N化合物沉积在第一金属N化合物层中以形成第二金属N化合物层。 将N饱和的GaN沉积在第二金属N化合物层上以形成第一GaN层。 在第一GaN层中沉积Ga饱和的GaN以形成第二GaN层。

    Nitride semiconductor device having floated gate electrode and method for manufacturing thereof
    3.
    发明公开
    Nitride semiconductor device having floated gate electrode and method for manufacturing thereof 无效
    具有浮动栅电极的氮化物半导体器件及其制造方法

    公开(公告)号:KR20120074911A

    公开(公告)日:2012-07-06

    申请号:KR20100136899

    申请日:2010-12-28

    CPC classification number: H01L29/66462 H01L23/3171 H01L23/3192 H01L29/42376

    Abstract: PURPOSE: A method for manufacturing a nitride based semiconductor device including a floated gate electrode is provided to improve operation speed of a nitride based semiconductor device by reducing parasitic capacitance due to high dielectric constant of a protective layer. CONSTITUTION: An epilayer(20,30,40) is formed on a base substrate(10). A source electrode(61) and a drain electrode(63) are formed on the epilayer at regular intervals. A protective layer(70) is formed for covering the epilayer. A gate contact hole(76) is formed between the source electrode and the drain electrode. The gate electrode(65) includes an electrode unit floated on a connection unit and the protective layer.

    Abstract translation: 目的:提供一种用于制造包括浮动栅电极的氮化物基半导体器件的方法,以通过降低由保护层的高介电常数引起的寄生电容来提高氮化物基半导体器件的操作速度。 构成:在基底(10)上形成外延层(20,30,40)。 源电极(61)和漏电极(63)以规则的间隔形成在外延层上。 形成保护层(70)以覆盖外延层。 在源电极和漏电极之间形成栅极接触孔(76)。 栅电极(65)包括浮在连接单元上的电极单元和保护层。

    Substrate holder for molecular beam epitaxy
    4.
    发明公开
    Substrate holder for molecular beam epitaxy 无效
    用于分子束外延的基板支架

    公开(公告)号:KR20120006237A

    公开(公告)日:2012-01-18

    申请号:KR20100066862

    申请日:2010-07-12

    Abstract: PURPOSE: A substrate holder for a molecular beam epitaxy apparatus is provided to reduce unevenness of a thermal expansion coefficient and processing temperature of a substrate, thereby minimizing crack generation within the substrate in a high temperature heating process. CONSTITUTION: A substrate holder(10') is formed into a tube shape which is opened in up and down directions. A protrusion(11) is arranged along the circumference in the inner surface of the substrate holder in order to horizontally mount an epitaxy target substrate(D). A plurality of supporting projections(12) is arranged in the upper surface of the protrusion in order to separate the substrate from the protrusion. A step shape groove is arranged in the inner upper part of the substrate holder. The substrate holder is manufactured with pure molybdenum or molybdenum alloy.

    Abstract translation: 目的:提供用于分子束外延装置的基板保持器,以减少基板的热膨胀系数和处理温度的不均匀性,从而使在高温加热过程中的基板内的裂纹产生最小化。 构成:衬底保持器(10')形成为在上下方向打开的管状。 在基板保持器的内表面中沿着圆周布置突起(11),以水平安装外延目标基板(D)。 在突起的上表面中布置有多个支撑突起(12),以将基板与突起分离。 在基板支架的内部上部配置有阶梯形槽。 衬底保持器由纯钼或钼合金制成。

    Transistor having heat dissipation structure
    5.
    发明公开
    Transistor having heat dissipation structure 有权
    具有散热结构的晶体管

    公开(公告)号:KR20100096942A

    公开(公告)日:2010-09-02

    申请号:KR20090016047

    申请日:2009-02-25

    Abstract: PURPOSE: A transistor having a heat dissipation structure is provided to effectively radiate heat generated from an electrode to the outside. CONSTITUTION: A substrate(10) has a front side and a back side. Multiple nitride layers(12, 14, 16, 18, 19) are formed on the front side of the substrate. A source electrode(31), a gate electrode(33) and a drain electrode(35) are formed on the multiple nitride layers. A heat radiation structure includes a cooling groove and a radiation layer(43). The cooling groove is formed on the back side of the substrate so that the substrate includes an area in which a plurality of electrodes is formed. The radiation layer is formed on the inner side of the cooling groove.

    Abstract translation: 目的:提供具有散热结构的晶体管,以有效地将从电极产生的热辐射到外部。 构成:衬底(10)具有前侧和后侧。 多个氮化物层(12,14,16,18,19)形成在衬底的正面上。 在多个氮化物层上形成源电极(31),栅电极(33)和漏电极(35)。 散热结构包括冷却槽和辐射层(43)。 冷却槽形成在基板的背面,使得基板包括其中形成有多个电极的区域。 辐射层形成在冷却槽的内侧。

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