公开(公告)号：JPH07202873A

公开(公告)日：1995-08-04

申请号：JP29122694

申请日：1994-11-25

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SAI SOUKUN ,  BOKU FUMIHARU ,  KAKU MEISHIN ,  SAI KAIKIYOKU

IPC: H03K27/00 ,  H03L7/087 ,  H03L7/089 ,  H03L7/14 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033

Abstract: PURPOSE: To supply a stabilized cock even when the input of a data signal or power supply is not normal. CONSTITUTION: When power is normally supplied and data signal is normally inputted, a loop selection switch 30 outputs a state '1' and a 1st loop circuit is selected. At this time, the phase of the data signal is compared with a clock outputted from a voltage controlled oscillator(VCO) 4 and a synchronizing clock is generated. In the case of restoring the system after a short-circuiting of a transmission line, the transmission interruption of a data signal or the interruption of power supply, a data signal monitoring part 40 or a power supply monitoring part 50 outputs a state '1', so that the switch 30 selects a 2nd loop. Then the phase of a reference clock built in the system itself is compared with that of a clock outputted from a VCO 28 to generate a synchronizing clock.