公开(公告)号：JPH10240849A

公开(公告)日：1998-09-11

申请号：JP26750197

申请日：1997-09-30

Applicant: KOREA TELECOMMUN

Inventor： HAN IL SONG ,  SAI EIZAI ,  KIN DAIKAN

IPC: G06G7/14 ,  G06F7/44 ,  G06G7/163 ,  G06G7/60 ,  G06N3/063

Abstract: PROBLEM TO BE SOLVED: To obtain the integrating machine with high performance which is able to operate at low voltage level, and the neural network synapse by using VLSI technology by including a 1st current mirror consisting of MOS transistors to generate a 1st current and a 2nd current mirror which consists of MOS transistors to generate a 2nd current and is coupled with the 1st current mirror in parallel. SOLUTION: An output current I0 fixes a supply voltage V1 and a voltage V3 applied to the gate of an n-channel MOSFET M2 of the 2nd current mirror. When a voltage V2 applied to the gate of an n-channel MOSFET M1 of the 1st current mirror is applied from outside, the final current I0 varies linearly with the current V2 . Namely, the output current I0 does not have a VT term as a secondary term, so this circuit is usable as an integrating machine. Further, elements are constituted in two stages between the supply voltage V1 and a ground voltage GND, so the loss of the voltage is small, so that low-voltage operation becomes possible.