PRASEODYMIUM-MANGANESE OXIDE LAYER FOR USE IN FIELD EMISSION DISPLAYS
    1.
    发明申请
    PRASEODYMIUM-MANGANESE OXIDE LAYER FOR USE IN FIELD EMISSION DISPLAYS 审中-公开
    用于场发射显示器中的氧化镁氧化物层

    公开(公告)号:WO1997043781A2

    公开(公告)日:1997-11-20

    申请号:PCT/US1997008257

    申请日:1997-05-14

    CPC classification number: H01J29/863

    Abstract: A conductive, light-absorbing baseplate for use in a field emission display is disclosed. The interior surface of the baseplate is coated with a praseodymium-manganese oxide layer having a resistivity that does not exceed 1 x 10 OMEGA .cm. A field emission display is also disclosed which comprises the conductive, light-absorbing baseplate, as well as processes for manufacturing the baseplate, field emission display and the conductive, light-absorbing praseodymium-manganese oxide material used to coat the baseplate.

    Abstract translation: 公开了一种用于场发射显示器的导电吸光基板。 基板的内表面涂覆有电阻率不超过1×10 5欧米汞厘米的镨锰氧化物层。 还公开了一种场致发射显示器,其包括导电吸光基板,以及用于制造用于涂覆基板的基板,场致发射显示器和导电的吸光镨锰氧化物材料的工艺。

    METHOD FOR SHARPENING EMITTER SITES USING LOW TEMPERATURE OXIDATION PROCESSES
    2.
    发明申请
    METHOD FOR SHARPENING EMITTER SITES USING LOW TEMPERATURE OXIDATION PROCESSES 审中-公开
    使用低温氧化工艺来稀释发射体场地的方法

    公开(公告)号:WO1996014650A1

    公开(公告)日:1996-05-17

    申请号:PCT/US1995014326

    申请日:1995-11-02

    CPC classification number: H01J9/025

    Abstract: An improved method for sharpening emitter sites for cold cathode field emission displays (FEDs) includes the steps of: forming a projection on a baseplate; growing an oxide layer on the projection using a low temperature oxidation process; and then stripping the oxide layer. Preferred low temperature oxidation processes include: wet bath anodic oxidation, plasma assisted oxidation and high pressure oxidation. These low temperature oxidation processes grow an oxide film using a consumptive process in which oxygen reacts with a material of the projection. This permits emitter sites to be fabricated with less distortion and grain boundary formation than emitter sites formed with thermal oxidation. As an example, emitter sites can be formed of amorphous silicon. In addition, low temperature materials such as glass can be used in fabricating baseplates without the introduction of high temperature softening and stress.

    Abstract translation: 用于锐化冷阴极场发射显示器(FED)的发射器位置的改进方法包括以下步骤:在基板上形成突起; 使用低温氧化工艺在投影上生长氧化物层; 然后剥离氧化物层。 优选的低温氧化方法包括:湿浴阳极氧化,等离子体辅助氧化和高压氧化。 这些低温氧化方法使用氧气与投影材料反应的消耗过程来生长氧化膜。 这允许制造发射极位置比具有热氧化形成的发射极位置更少的变形和晶界形成。 作为示例,发射极位置可以由非晶硅形成。 此外,低温材料如玻璃可用于制造基板,而不引入高温软化和应力。

    LIGHT-INSENSITIVE RESISTOR FOR CURRENT-LIMITING OF FIELD EMISSION DISPLAYS
    3.
    发明申请
    LIGHT-INSENSITIVE RESISTOR FOR CURRENT-LIMITING OF FIELD EMISSION DISPLAYS 审中-公开
    用于现场排放显示器限流的光敏电阻器

    公开(公告)号:WO1998008243A1

    公开(公告)日:1998-02-26

    申请号:PCT/US1997014693

    申请日:1997-08-20

    Abstract: A semiconductor device for use in field emission displays includes a substrate (30) formed from a semiconductor material, glass, soda lime, or plastic. A first layer of a conductive material (28) is formed on the substrate. A second resistive layer of microcrystalline silicon (32) is formed on the first layer. This layer has characteristics that do not fluctuate in response to conditions that vary during the operation of the field emission display, particularly the varying light intensity from the emitted electrons or from the ambient. One or more cold-cathode emitters (34) are formed on the second layer.

    Abstract translation: 用于场发射显示器的半导体器件包括由半导体材料形成的衬底(30),玻璃,钠钙或塑料。 导电材料(28)的第一层形成在衬底上。 在第一层上形成微晶硅(32)的第二电阻层。 该层具有响应于在场发射显示器的操作期间变化的条件,特别是来自发射的电子或来自环境的变化的光强度而不波动的特性。 一个或多个冷阴极发射器(34)形成在第二层上。

    HIGH SPEED DATA SAMPLING SYSTEM
    4.
    发明申请
    HIGH SPEED DATA SAMPLING SYSTEM 审中-公开
    高速数据采集系统

    公开(公告)号:WO1997020304A1

    公开(公告)日:1997-06-05

    申请号:PCT/US1996019273

    申请日:1996-12-02

    Abstract: A system for sampling an analog or digital data signal at a relatively high rate utilizing relatively slow circuitry. The system (40) includes several sample and hold circuits (42 - 50), each of which receive the data signal. The sample and hold circuits (42- 50) are clocked by respective clock signals ( PHI 1... PHI n)that are at the same frequency but equally phased apart from each other. Thus, the sample and hold circuits take samples of the data signal at times that are equally spaced apart from each other. Each of the sample and hold circuits is connected to a series of shift registers (62 - 70) that are clocked at the same frequency as the clock used to clock the sample and hold circuit to which they are connected. The shift registers operate to sequentially store samples (S1... Sn) obtained by their respective sample and hold circuit. The output of the shift registers (82 - 90) may be applied to the column drivers of a conventional matrix display.

    Abstract translation: 一种利用相对较慢的电路以相对高的速率对模拟或数字数据信号进行采样的系统。 系统(40)包括几个采样和保持电路(42-50),每个采样和保持电路接收数据信号。 采样和保持电路(42-50)由相同的时钟信号(PHI 1 ... PHI n)来计时,这些时钟信号的频率相同,但相互分开。 因此,采样和保持电路在彼此相等间隔的时间采集数据信号的采样。 每个采样和保持电路连接到一系列移位寄存器(62 - 70),这些移位寄存器的时钟频率与用于对其连接的采样和保持电路进行时钟的时钟频率相同。 移位寄存器用于顺序地存储由它们各自的采样和保持电路获得的采样(S1 ... Sn)。 移位寄存器(82-90)的输出可以应用于常规矩阵显示器的列驱动器。

    MANUFACTURING PROCESS FOR HIGH-PURITY PHOSPHORS HAVING UTILITY IN FIELD EMISSION DISPLAYS
    5.
    发明申请
    MANUFACTURING PROCESS FOR HIGH-PURITY PHOSPHORS HAVING UTILITY IN FIELD EMISSION DISPLAYS 审中-公开
    具有现场排放显示器用途的高纯度磷酸盐的制造工艺

    公开(公告)号:WO1996041846A1

    公开(公告)日:1996-12-27

    申请号:PCT/US1996009735

    申请日:1996-06-10

    CPC classification number: C09K11/0805 C09K11/08 C09K11/0827

    Abstract: A process is provided for manufacturing high-purity phosphors having utility in field emission displays. The high-purity phosphor is a host lattice infiltrated by a dopant that activates luminescent properties therein. The lattice and dopant are initially milled together to reduce their average particle size while simultaneously achieving complete mixing between the lattice and the dopant. The resulting mixture is maintained free of a flux or substantially any other treatment agent capable of contaminating the phosphor and placed in a heating vessel formed from a substantially impervious contaminant-free material. The mixture is heated to a high temperature effectuating thorough infiltration of the dopant into the lattice structure. The use of an impervious contaminant-free heating vessel and the exclusion of flux or other treatment agents from the mixture avoids undesirable contamination and undue particle size growth of the phosphor product during the manufacture thereof. Accordingly, product is a high-purity phosphor having a small average particle size, yet exhibiting sufficient luminescent efficiencies for utility in field emission displays as a luminescent coating for the anode screen.

    Abstract translation: 提供了用于制造在场发射显示器中具有实用性的高纯度荧光体的方法。 高纯度荧光体是由掺杂剂渗透的主体晶格,其激活其中的发光性质。 晶格和掺杂剂最初被研磨在一起以降低其平均粒度,同时实现晶格和掺杂剂之间的完全混合。 所得混合物保持没有助焊剂或基本上任何能够污染荧光体并且放置在由基本上不渗透的无污染物质形成的加热容器中的其它处理剂。 将混合物加热到高温,使掺杂剂彻底渗透到晶格结构中。 使用不渗透无污染物的加热容器以及从混合物排除助熔剂或其它处理剂避免了在其制造过程中不期望的污染和不适当的粒度增长的荧光体产品。 因此,产品是具有小平均粒度的高纯度荧光体,但在场发射显示器中作为阳极屏的发光涂层显示出足够的发光效率。

    SHIELDED FIELD EMISSION DISPLAY
    6.
    发明申请
    SHIELDED FIELD EMISSION DISPLAY 审中-公开
    屏蔽场发射显示

    公开(公告)号:WO1997042644A1

    公开(公告)日:1997-11-13

    申请号:PCT/US1997007855

    申请日:1997-05-05

    Abstract: A field emission display having emitters controlled by an integrated driving circuit. The field emission display includes a charge shield positioned above exposed areas of the substrate to protect driving circuitry integrated into the substrate. The charge shield is a conductive layer within an insulative layer covering the driving circuit. The charge shield is connected to ground or to a low reference potential to bleed away current within the insulative layer, thereby preventing drifting charges from affecting the electrical response of the integrated driving circuit. The charge shield also terminates electric fields within the insulative layer to reduce the effect on the integrated driving circuit of dynamic variations in surface charge. Electrical characteristics of the driving circuit thus remain constant, reducing variations in the current supplied to the emitters, thereby reducing variations in the intensity of light emitted by the display.

    Abstract translation: 具有由集成驱动电路控制的发射极的场致发射显示器。 场发射显示器包括位于衬底的暴露区域之上的电荷屏蔽,以保护集成到衬底中的驱动电路。 电荷屏蔽是覆盖驱动电路的绝缘层内的导电层。 电荷屏蔽层连接到地或低参考电位以排除绝缘层内的电流,从而防止漂移电荷影响集成驱动电路的电响应。 电荷屏蔽还终止绝缘层内的电场,以减少集成驱动电路对表面电荷的动态变化的影响。 因此,驱动电路的电气特性保持恒定,减少了提供给发射器的电流的变化,从而减少了由显示器发射的光的强度变化。

    PROCESS FOR ALIGNING AND SEALING FIELD EMISSION DISPLAYS
    7.
    发明申请
    PROCESS FOR ALIGNING AND SEALING FIELD EMISSION DISPLAYS 审中-公开
    对准和密封场发射显示的过程

    公开(公告)号:WO1997023893A1

    公开(公告)日:1997-07-03

    申请号:PCT/US1996016653

    申请日:1996-10-17

    CPC classification number: H01J9/261 H01J2201/304 H01J2329/00

    Abstract: According to two aspects of the invention, a FED and a process for making a FED are provided which effectuate more accurate and efficient sealing between a faceplate and a backplate assembly, with more accurate and efficient sealing between the faceplate (10) and cathode member (12). The FED is made according to a process comprising: aligning the faceplate and the cathode member; disposing an adhesive (16) between the faceplate and the cathode member; pressing the faceplate and the cathode member together; disposing a frit seal (18) between the faceplate and the backplate assembly; and heating the frit seal to a temperature sufficient to cause the frit to seal.

    Abstract translation: 根据本发明的两个方面,提供FED和制造FED的方法,其在面板和背板组件之间实现更准确和有效的密封,在面板(10)和阴极构件(10)之间具有更精确和有效的密封 12)。 FED根据包括:对准面板和阴极构件的方法制成; 在面板和阴极构件之间布置粘合剂(16); 将面板和阴极部件一起按压; 在面板和背板组件之间设置玻璃料密封件(18); 并将玻璃料密封件加热到足以使玻璃料密封的温度。

    FIELD EMISSION DISPLAY DEVICE WITH FOCUSING ELECTRODES AT THE ANODE AND METHOD FOR CONSTRUCTING SAME
    8.
    发明申请
    FIELD EMISSION DISPLAY DEVICE WITH FOCUSING ELECTRODES AT THE ANODE AND METHOD FOR CONSTRUCTING SAME 审中-公开
    在阳极上具有聚焦电极的场发射显示装置及其构造方法

    公开(公告)号:WO1997008731A1

    公开(公告)日:1997-03-06

    申请号:PCT/US1996012793

    申请日:1996-08-07

    CPC classification number: H01J29/085

    Abstract: A field emission display device includes a baseplate having a set of field-induced electron emitters for each pixel in a display. Each set includes a plurality of emitters each carried by a supporting substrate and disposed within a respective aperture in an insulating layer deposited on the surface of the substrate. A conductive layer is deposited on the insulating layer peripherally about the apertures. A plurality of emitter conductors are each operatively coupled to the emitters of one of the sets of emitters. A conductive voltage applied to the conductive layer and a source voltage applied to one of the emitter conductors causes the emitters coupled to the emitter conductor to each emit an electron emission. The display device also includes a faceplate having a transparent viewing layer positioned in a parallel spaced-apart relationship with the baseplate. An anode is deposited on a planar surface of the viewing layer opposite the sets of emitters. A luminescent layer has a plurality of localized portions each deposited on the anode opposite one of the sets of emitters so that an anode voltage applied to the anode will direct any electron emissions from the emitters toward the localized portions of the luminescent layer. Finally, a plurality of focusing electrodes each comprising a conductive strip are deposited on the planar surface of the viewing layer around the periphery of a respective localized portion of the luminescent layer substantially opposite the respective set of emitters of the localized portion so that a focusing electrode voltage which is less than the anode voltage applied to the focusing electrodes will focus these electron emissions on the localized portions of the luminescent layer.

    Abstract translation: 场发射显示装置包括具有用于显示器中的每个像素的一组场致电子发射器的基板。 每组包括多个发射器,每个发射器由支撑衬底承载并且设置在沉积在衬底的表面上的绝缘层中的相应孔内。 导电层围绕孔围绕绝缘层沉积。 多个发射极导体各自可操作地耦合到发射器组之一的发射器。 施加到导电层的导电电压和施加到一个发射极导体的源极电压使得耦合到发射极导体的发射极各自发射电子发射。 显示装置还包括具有与底板平行间隔开的​​关系定位的透明观察层的面板。 阳极沉积在观察层的与发射体组相对的平坦表面上。 发光层具有多个局部部分,每个局部部分沉积在与发射体组中的一个相反的阳极上,使得施加到阳极的阳极电压将引导来自发射体的任何电子发射朝向发光层的局部部分。 最后,包括导电条的多个聚焦电极沉积在观察层的平坦表面上,围绕发光层的相应局部部分的外周基本上与局部部分的各组发射体相对,使得聚焦电极 小于施加到聚焦电极的阳极电压的电压将这些电子发射聚焦在发光层的局部部分上。

    MATRIX ADDRESSABLE DISPLAY WITH ELECTROSTATIC DISCHARGE PROTECTION
    9.
    发明申请
    MATRIX ADDRESSABLE DISPLAY WITH ELECTROSTATIC DISCHARGE PROTECTION 审中-公开
    具有静电放电保护功能的矩阵可寻址显示器

    公开(公告)号:WO1998010457A1

    公开(公告)日:1998-03-12

    申请号:PCT/US1997015653

    申请日:1997-09-04

    CPC classification number: H01J31/127 H01J3/022 H01J2201/319 H01J2329/92

    Abstract: A field emission display includes electrostatic discharge protection circuits coupled to an emitter substrate and an extraction grid. In the preferred embodiment, the electrostatic discharge circuit includes diodes reverse biased between grid sections and a first reference potential or between row lines and a second reference potential. The diodes provide a current path to discharge static voltage and thereby prevent a high voltage differential from being maintained between the emitter sets and the extraction grids. The diodes thereby prevent the emitter sets from emitting electrons at a high rate that may damage or destroy the emitter sets. In one embodiment, the diodes are coupled directly between the grid sections and the row lines. In one embodiment, the diodes are formed in an insulative layer carrying the grid sections. In another embodiment, the diodes are integrated into the emitter substrate.

    Abstract translation: 场发射显示器包括耦合到发射极衬底和提取栅极的静电放电保护电路。 在优选实施例中,静电放电电路包括在网格部分和第一参考电位之间或在行线和第二参考电位之间反向偏置的二极管。 二极管提供电流路径来放电静电压,从而防止在发射极组和提取栅之间保持高电压差。 因此,二极管可防止发射极组以可能损坏或破坏发射极组的高速率发射电子。 在一个实施例中,二极管直接连接在网格部分和行线之间。 在一个实施例中,二极管形成在承载网格部分的绝缘层中。 在另一个实施例中,二极管被集成到发射器衬底中。

    METHOD OF PHASE SHIFT LITHOGRAPHY
    10.
    发明申请
    METHOD OF PHASE SHIFT LITHOGRAPHY 审中-公开
    相移方法

    公开(公告)号:WO1998002784A1

    公开(公告)日:1998-01-22

    申请号:PCT/IB1996000788

    申请日:1996-07-15

    CPC classification number: G03F1/34 G03F1/70 G03F7/2002 G03F7/70283 H01J9/025

    Abstract: A method of phase shift lithography includes forming a chromeless phase shift reticle (10) with a pattern of parallel, spaced phase shifters (14). An exposure energy (22) is directed through the phase shift reticle (10) and onto a target (18) having a layer resist (23) formed thereon. Following an initial exposure, the phase shift reticle (10) is rotated and the resist (23) is exposed a second time. The resist (23) is then developed to form features in areas of resist that have not been exposed. These areas correspond to the projected points of intersection (34) of the phase shifters (14). Using a positive tone resist, solid resist features are formed. These solid features can be used to form a mask (46) for etching the target (18) to form field emitter sites (38) for a field emission display. Using a negative tone resist, open areas are formed in the resist (23) and can be used to deposit a material on the substrate such as contacts (56) on a semiconducting substrate (48). The method of the invention can also be implemented using two different reticles (10) with intersecting patterns or using a single reticle (10) having intersecting phase shift areas.

    Abstract translation: 相移光刻的方法包括用平行的间隔移相器(14)的图案形成无铬相移掩模版(10)。 曝光能量(22)被引导通过相移掩模版(10)并被引导到其上形成有层抗蚀剂(23)的靶(18)上。 在初始曝光之后,相移掩模版(10)旋转并且抗蚀剂(23)第二次曝光。 然后将抗蚀剂(23)显影以在抗蚀剂的未暴露的区域中形成特征。 这些区域对应于移相器(14)的投影交点(34)。 使用正性抗蚀剂,形成固体抗蚀剂特征。 这些固体特征可以用于形成用于蚀刻靶(18)的掩模(46),以形成用于场发射显示的场发射器位置(38)。 使用负色调抗蚀剂,在抗蚀剂(23)中形成开放区域,并且可以用于将材料沉积在诸如半导体衬底(48)上的触点(56)的衬底上。 本发明的方法还可以使用具有相交图案的两个不同的标线(10)或使用具有相交相移区域的单个掩模版(10)来实现。

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