中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.031 seconds)

    METHODS FOR MANUFACTURING A MICROSTRUCTURE
    2.
    发明申请
    METHODS FOR MANUFACTURING A MICROSTRUCTURE 审中-公开
    制造微结构的方法

    公开(公告)号：WO2009048321A3

    公开(公告)日：2009-06-04

    申请号：PCT/NL2008000217

    申请日：2008-10-03

    Applicant: MICRONIT MICROFLUIDICS BV ,  VAN T OEVER RONNY ,  BLOM MARKO THEODOOR ,  OONK JOHANNES

    Inventor： VAN T OEVER RONNY ,  BLOM MARKO THEODOOR ,  OONK JOHANNES

    IPC: B81C1/00

    CPC classification number: B81C1/00119 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C2201/0146

    Abstract: Methods for manufacturing a microstructure, wherein use is made of powder blasting and/or etching and a single mask layer with openings and structures of varying dimensions, characterized in that the mask layer at least at one given point in time has been wholly worn away within at least one region by mask erosion while the microstructure is not yet wholly realized. Use can be made of a combination of 'vertical' erosion, i.e. parallel to the thickness direction, and 'horizontal' erosion, i.e. perpendicularly of the thickness direction, of the mask layer. The horizontal mask erosion occurs at the edges of the mask structure. By selecting the size of the mask openings and the mask structures in a correct manner the mask layer in a region with smaller mask structures will be fully worn away at a given point in time, while in another region with larger structures the mask layer still has sufficient thickness to serve as protection against the powder blasting or etching.

    Abstract translation: 用于制造微结构的方法，其中使用粉末喷射和/或蚀刻以及具有不同尺寸的开口和结构的单个掩模层，其特征在于，至少在一个给定时间点的掩模层已经完全磨损在内部 至少一个区域通过掩模侵蚀而微结构尚未完全实现。 使用可以由掩模层的“垂直”侵蚀，即平行于厚度方向和“水平”侵蚀，即垂直于厚度方向的侵蚀的组合。 在掩模结构的边缘处发生水平掩模腐蚀。 通过以正确的方式选择掩模开口和掩模结构的尺寸，具有较小掩模结构的区域中的掩模层将在给定时间点被完全磨损，而在具有较大结构的另一区域中，掩模层仍具有 足够的厚度以作为防止粉末爆破或蚀刻的保护。

    METHOD OF BONDING TWO SUBSTRATES AND DEVICE MANUFACTURED THEREBY
    3.
    发明申请
    METHOD OF BONDING TWO SUBSTRATES AND DEVICE MANUFACTURED THEREBY 审中-公开
    结合两个基板的方法和由其制造的器件

    公开(公告)号：WO2013095147A1

    公开(公告)日：2013-06-27

    申请号：PCT/NL2012050922

    申请日：2012-12-21

    Applicant: MICRONIT MICROFLUIDICS BV

    Inventor： VAN T OEVER RONNY ,  BLOM MARKO THEODOOR ,  HANEVELD JEROEN ,  OONK JOHANNES ,  OLDE RIEKERINK MARINUS BERNARDUS ,  TIJSSEN PETER ,  TIGELAAR HENDRIK JAN HILDEBRAND ,  FEHR JEAN-NOEL ,  ROULET JEAN-CHRISTOPHE ,  GUPTA AMITAVA

    IPC: H01L23/10 ,  B81C1/00 ,  H01L21/50

    CPC classification number: B81C1/00269 ,  B81B2201/058 ,  B81C3/001 ,  B81C2201/0132 ,  B81C2203/0118 ,  B81C2203/019 ,  C23F1/02 ,  H01L21/50 ,  H01L23/10 ,  H01L2924/0002 ,  Y10T428/239 ,  H01L2924/00

    Abstract: The invention relates to method for bonding at least two substrates, for example made from glass, silicon, ceramic,aluminum, or boron, by using an intermediate thin film metal layer for providing the bonding, said method comprising the following steps of: a) providing said two substrates; b) depositing said thin film metal layer on at least a part of a surface of a first substrate of the two substrates; c) bringing a surface of the second substrate into contact with said thin film metal layer on said surface of the first substrate such that a bonding between the second substrate and the thin film metal layer on the first substrate is provided; and d) at least locally strengthening the bonding between the second substrate and the thin film metal layer on the first substrate. The invention also relates to a device comprising two substrates, for example made from glass, silicon, ceramic, aluminum, or boron, and an intermediate thin film metal layer.

    Abstract translation: 本发明涉及用于通过使用用于提供结合的中间薄膜金属层来结合例如由玻璃，硅，陶瓷，铝或硼制成的至少两个基板的方法，所述方法包括以下步骤：a） 提供所述两个衬底; b）在所述两个衬底中的第一衬底的至少一部分表面上沉积所述薄膜金属层; c）使第二衬底的表面与第一衬底的所述表面上的所述薄膜金属层接触，使得提供第二衬底和第一衬底上的薄膜金属层之间的结合; 以及d）至少局部地加强第二衬底和第一衬底上的薄膜金属层之间的结合。 本发明还涉及包括例如由玻璃，硅，陶瓷，铝或硼制成的两个基板和中间薄膜金属层的器件。

    METHOD FOR FORMING AN ELECTRICALLY CONDUCTIVE VIA IN A SUBSTRATE.
    6.
    发明专利
    METHOD FOR FORMING AN ELECTRICALLY CONDUCTIVE VIA IN A SUBSTRATE. 未知

    公开(公告)号：NL2009757C2

    公开(公告)日：2014-05-08

    申请号：NL2009757

    申请日：2012-11-05

    Applicant: MICRONIT MICROFLUIDICS BV

    Inventor： OEVER RONNY ,  BLOM MARKO THEODOOR ,  HANEVELD JEROEN ,  OONK JOHANNES ,  TIJSSEN PETER

    IPC: H01L21/48 ,  H01L21/683 ,  H01L23/14

    Abstract: A method for forming an electrically conductive via in a substrate that includes the steps of: forming a through hole in a first substrate; bringing a first surface of a second substrate into contact with the first surface of the first substrate, such that the through hole in the first substrate is covered by the first surface of the second substrate; filling the through hole in the first substrate with an electrically conductive material by electroplating to form the electrically conductive via, and removing the second substrate, wherein the first surface of the first and the second substrate each have a surface roughness Ra of less than 2 nm, preferably less than 1 nm, more preferably less than 0.5 nm, and the first surface of the first and the second substrate are brought in direct contact with each other, such that a direct bond is formed there between.

Patent Agency Ranking