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公开(公告)号：FR2815196A1
公开(公告)日：2002-04-12
申请号：FR0012809
申请日：2000-10-06
Applicant: ST MICROELECTRONICS SA
Inventor： BAILLY ALAIN , ESTEVE LIONEL
Abstract: The error amplifier comprises an operational amplifier (1') whose output controls an active load (10), which is a MOS transistor, for discharging a resistive-capacitive network (R4,C4) connected to a reference-current (Iref) source (12), and resistors (R5,R6) connected so to recopy the reference current into an input resistor (R). The input node (6') receives a measured or controlled signal (Vreg), and the error signal (Ve) is available on the nodes of the resistive-capacitive network. The transfer function is tuned by the resistive and capacitive values (R4,C4). The inputs of operational amplifier are each connected by a resistor (R5,R6) to a reference potential, which is the ground node (7) potential. The first power node (11) of active load is also the output node and is connected by the intermediary of the reference-current source (12) to the supply voltage (Vdd), and the second power node (13) is connected to one input of the operational amplifier; the other input is connected to the anode (4') dividing the input voltage according to the values of resistances (R,R6). The resistive-capacitive network comprises a resistor (R4) connected in parallel with a capacitor (C4) between the output node and the ground. The error amplifier is implemented in the form of an integrated circuit wherein all resistances and capacitances are integrated with the operational amplifier except the input resistor (R).
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公开(公告)号：FR2815196B1
公开(公告)日：2003-03-21
申请号：FR0012809
申请日：2000-10-06
Applicant: ST MICROELECTRONICS SA
Inventor： BAILLY ALAIN , ESTEVE LIONEL
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