公开(公告)号：EP3913345A1

公开(公告)日：2021-11-24

申请号：EP21171960.4

申请日：2021-05-04

Applicant: STMicroelectronics S.r.l.

Inventor： ZAMPROGNO, Marco ,  BARBIERI, Andrea ,  FLORA, Pasquale ,  FURCERI, Raffaele Enrico

IPC: G01L9/04

Abstract: A bridge driver circuit (104) applies a bias voltage across first (142) and second (144) input nodes of a resistive bridge circuit (102) configured to measure a physical property such as pressure or movement. A sensing circuit (185) senses a bridge current (Ipbridge, Inbridge) that flows through the resistive bridge circuit (102) in response to the applied bias voltage. A temperature dependent sensitivity of the resistive bridge circuit (102) is determined by processing the sensed bridge current. A voltage output at first (146) and second (148) output nodes of the resistive bridge circuit (102) is processed to determine a value of the physical property. This processing further involves applying a temperature correction in response to the determined temperature dependent sensitivity.

公开(公告)号：EP3407490A1

公开(公告)日：2018-11-28

申请号：EP18172935.1

申请日：2018-05-17

Applicant: STMicroelectronics S.r.l.

Inventor： ZAMPROGNO, Marco ,  BONGIORNI, Maurizio ,  FLORA, Pasquale

IPC: H03F3/45 ,  H03F1/02

CPC classification number: H03F3/45273 ,  H03F1/0205 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45192 ,  H03F3/45632 ,  H03F2200/513 ,  H03F2203/45654

Abstract: In a single-stage differential operational amplifier (30): an input stage formed by a pair of input transistors (31, 32), having control terminals connected to a respective first and second input (IN+, IN - ), first conduction terminals coupled to a respective first and second output (OUT-, OUT + ) and second conduction terminals able to receive a polarization current (I b ); an output stage formed by a pair of output transistors (34, 35), in diode configuration, having control terminals able to be coupled to a relative first conduction terminal, connected to a respective first and second output (OUT-, OUT+), and second conduction terminals connected to a reference line (gnd). A coupling stage (36) is furthermore interposed between the first conduction terminals of the output transistors (34, 35) and the first and second output (OUT-, OUT+) to define the diode configuration of the output transistors (34, 35) and moreover a gain value (G) of the operational amplifier (30) .