公开(公告)号：EP4137366A2

公开(公告)日：2023-02-22

申请号：EP22190946.8

申请日：2022-08-18

Applicant: STMicroelectronics S.r.l.

Inventor： ARGENTO, Davide ,  PENNISI, Orazio ,  CASTORINA, Stefano ,  POLETTO, Vanni ,  LANDINI, Matteo ,  MAINO, Andrea

IPC: B60R21/017 ,  G01R27/26 ,  G01R31/00 ,  G01R31/64 ,  B60R21/01

Abstract: A system and method for measuring a capacitance value of a capacitor (102) are provided. In embodiments, a resistor (112) is coupled to a terminal of the capacitor (102). A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor (102) is measured. The discharge routine includes sinking a current through a discharge circuit (108, 110) coupled to the resistor (112) from first to second. Integration of a difference in voltage at terminals of the resistor (112) during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor (112). The health of the capacitor (102) is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：EP4137366A3

公开(公告)日：2023-05-03

申请号：EP22190946.8

申请日：2022-08-18

Applicant: STMicroelectronics S.r.l.

Inventor： ARGENTO, Davide ,  PENNISI, Orazio ,  CASTORINA, Stefano ,  POLETTO, Vanni ,  LANDINI, Matteo ,  MAINO, Andrea

IPC: B60R21/017 ,  G01R27/26 ,  G01R31/00 ,  G01R31/64 ,  B60R21/01

Abstract: A system and method for measuring a capacitance value of a capacitor (102) are provided. In embodiments, a resistor (112) is coupled to a terminal of the capacitor (102). A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor (102) is measured. The discharge routine includes sinking a current through a discharge circuit (108, 110) coupled to the resistor (112) from first to second. Integration of a difference in voltage at terminals of the resistor (112) during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor (112). The health of the capacitor (102) is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：EP4137824A1

公开(公告)日：2023-02-22

申请号：EP22190928.6

申请日：2022-08-18

Applicant: STMicroelectronics S.r.l.

Inventor： ARGENTO, Davide ,  PENNISI, Orazio ,  CASTORINA, Stefano ,  POLETTO, Vanni ,  LANDINI, Matteo ,  MAINO, Andrea

IPC: G01R27/26 ,  B60R21/017 ,  G01R31/00 ,  G01R31/64 ,  B60R21/01

Abstract: A system and method is provided for measuring a voltage drop at a node (V IN ). In embodiments, a circuit includes an analog-to-digital converter (402), a current sink (406), and a controller. The input of the analog-to-digital converter (402) and the input of the current sink (406) is coupled to the node (V IN ) to be measured. A set point for the current sink (406) is determined. The output of the analog-to-digital converter (402) during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter (402) during the voltage drop from a sampled output of the analog-to-digital converter (402) during a steady-state condition. The current sink (406) operating at the set point during the steady-state condition and during the voltage drop.