Abstract:
The invention relates to an architecture for distributing supply voltages to a plurality of memory modules (Mod1, ..., ModN) supplied through a plurality of charge pump circuits (Pump1, ..., PumpM). Advantageously according to the invention, the architecture for distributing supply voltages comprises a sorting block (11) bidirectionally-connected to the plurality of memory modules (Mod1, ..., ModN) from which it receives a plurality of power requests and it is capable of providing a sorting signal (ORD) of said power requests on the basis of a priority scale in order to drive the plurality of charge pump circuits (Pump1, , PumpM) and distribute convenient supply voltages (Vhigh1, ..., VhighN; Vneg1, ..., VnegN) to the plurality of memory modules (Mod1, ..., ModN). Moreover, this architecture is software-configurable.