公开(公告)号：EP1835618A1

公开(公告)日：2007-09-19

申请号：EP06425173.9

申请日：2006-03-16

Applicant: STMicroelectronics S.r.l.

Inventor： Vimercati, Daniele ,  Schippers, Stefan ,  Villa, Corrado ,  Zambelli, Yuri

IPC: H03K5/15 ,  G06F1/10

CPC classification number: H03K5/15013

Abstract: Cumulative delay contributions introduced by an input buffer and by the metal line that distributes the buffered external control signal to a plurality of synchronizing and/or enabling circuits for performing a transfer of data to and from an integrated device, can be significantly reduced by having the external signal applied on a pad distributed unbuffered through a metal line of sufficiently large size (conductivity) such to introduce a negligible intrinsic propagation delay, though fulfilling the specified maximum admitted input pad capacitance, and by realizing locally dedicated input buffers to each of a plurality of synchronizing and/or enabling circuits of data transfer of the integrated device for applying thereto a buffered replica of the external signal present on said distributing metal line.

Abstract translation: 通过在INPUTBUFFER和由含金属的引入累积延迟的贡献没有分配缓冲的外部控制信号，以同步和/或使能电路在集成设备执行传输数据的向和从的复数，可以显着地由具有减少的 应用上的焊盘的外部信号通过寻求以引入可忽略的固有传播延迟足够大的尺寸（导电率）的金属线分布缓冲，虽然满足规定的最大承认输入衬垫电容，并且通过实现本地专用输入缓冲器的每一个的多个 的同步和/或使该集成器件的数据传送电路，用于向其施加存在于所述分配含金属的外部信号的缓冲的复制品。